JOSMA V1.0.2
Analysing file: BP-after-mem-read-or-write.raw

Found 27183 samples
 TDI 1011 = b, L: 4 
 TDO 0001 = 1, L: 4 
 TDI 1_0010_0000_0000_0000_1001 = 1_20009, L: 21 
 TDO 0_0000_0000_0000_0000_0000 = 0_00000, L: 21 
 TDI 1_0011_0000_0000_0011_1101 = 1_3003d, L: 21 
 TDO 1_0010_0000_0000_0000_1001 = 1_20009, L: 21 
 TDI 0_1000 = 0_8, L: 5 
 TDO 1_1101 = 1_d, L: 5 
 TDI 0_1000_0000_0000_0011_1101 = 0_8003d, L: 21 
 TDO 0_1000_0100_0000_0000_0000 = 0_84000, L: 21 
 TDI 1_1000_0100_0000_1001_0000 = 1_84090, L: 21 
 TDO 0_1000_0100_0000_0000_0000 = 0_84000, L: 21 

INST: CMD 0xb (OCD ctrl and status)
 TDI 0_1101 = 0_d, L: 5 
 TDO 1_0000 = 1_0, L: 5 
 TDI 0000_0000_0000_0000 = 0000, L: 16 
 TDO 1000_0000_0000_1100 = 800c, L: 16 

INST: CMD 0xa (avr instruction)
 TDI 1110_1111_1111_1111 = efff, L: 16 	ldi	r31, 0xFF	; 255
 TDO 0000_0011_1110_0101 = 03e5, L: 16 

INST: CMD 0xa (avr instruction)
 TDI 1110_1111_1110_1011 = efeb, L: 16 	ldi	r30, 0xFB	; 251
 TDO 0000_0011_1110_0111 = 03e7, L: 16 

INST: CMD 0xa (avr instruction)
 TDI 1001_0101_1010_1000 = 95a8, L: 16 	wdr
 TDO 0000_0011_1110_1001 = 03e9, L: 16 

INST: CMD 0xa (avr instruction)
 TDI 1001_0100_0000_1001 = 9409, L: 16 	ijmp
 TDO 0000_0011_1110_1011 = 03eb, L: 16 

INST: CMD 0xa (avr instruction)
 TDI 1110_0000_1111_0000 = e0f0, L: 16 	ldi	r31, 0x00	; 0
 TDO 0001_1111_1111_1100 = 1ffc, L: 16 

INST: CMD 0xa (avr instruction)
 TDI 1110_0111_1110_0011 = e7e3, L: 16 	ldi	r30, 0x73	; 115
 TDO 0001_1111_1111_1110 = 1ffe, L: 16 

INST: CMD 0xb (OCD ctrl and status)
 TDI 0_1101 = 0_d, L: 5 
 TDO 0_0000 = 0_0, L: 5 
 TDI 0_1101_0110_0011_1100_1000 = 0_d63c8, L: 21 
 TDO 0_1101_1000_0000_0000_1100 = 0_d800c, L: 21 
 TDI 1_1101_0000_0000_0000_1100 = 1_d000c, L: 21 
 TDO 0_1101_1000_0000_0000_1100 = 0_d800c, L: 21 

INST: CMD 0xa (avr instruction)
 TDI 1110_0000_0000_0000 = e000, L: 16 	ldi	r16, 0x00	; 0
 TDO 0000_0000_0000_0000 = 0000, L: 16 

INST: CMD 0xa (avr instruction)
 TDI 1011_1001_0000_0000 = b900, L: 16 	out	0x00, r16	; 0
 TDO 0000_0000_0000_0010 = 0002, L: 16 

INST: CMD 0xa (avr instruction)
 TDI 1110_1111_0000_1000 = ef08, L: 16 	ldi	r16, 0xF8	; 248
 TDO 0000_0000_0000_0100 = 0004, L: 16 

INST: CMD 0xa (avr instruction)
 TDI 1011_1001_0000_0001 = b901, L: 16 	out	0x01, r16	; 1
 TDO 0000_0000_0000_0110 = 0006, L: 16 

INST: CMD 0xa (avr instruction)
 TDI 1110_1111_0000_1110 = ef0e, L: 16 	ldi	r16, 0xFE	; 254
 TDO 0000_0000_0000_1000 = 0008, L: 16 

INST: CMD 0xa (avr instruction)
 TDI 1011_1001_0000_0010 = b902, L: 16 	out	0x02, r16	; 2
 TDO 0000_0000_0000_1010 = 000a, L: 16 

INST: CMD 0xa (avr instruction)
 TDI 1110_0000_0000_0000 = e000, L: 16 	ldi	r16, 0x00	; 0
 TDO 0000_0000_0000_1100 = 000c, L: 16 

INST: CMD 0xa (avr instruction)
 TDI 1011_1001_0000_0111 = b907, L: 16 	out	0x07, r16	; 7
 TDO 0000_0000_0000_1110 = 000e, L: 16 

INST: CMD 0xa (avr instruction)
 TDI 1110_0000_0000_0000 = e000, L: 16 	ldi	r16, 0x00	; 0
 TDO 0000_0000_0001_0000 = 0010, L: 16 

INST: CMD 0xa (avr instruction)
 TDI 1011_1001_0000_1001 = b909, L: 16 	out	0x09, r16	; 9
 TDO 0000_0000_0001_0010 = 0012, L: 16 

INST: CMD 0xa (avr instruction)
 TDI 1110_0000_0000_0000 = e000, L: 16 	ldi	r16, 0x00	; 0
 TDO 0000_0000_0001_0100 = 0014, L: 16 

INST: CMD 0xa (avr instruction)
 TDI 1011_1001_0000_1010 = b90a, L: 16 	out	0x0a, r16	; 10
 TDO 0000_0000_0001_0110 = 0016, L: 16 

INST: CMD 0xa (avr instruction)
 TDI 1110_0000_0000_0000 = e000, L: 16 	ldi	r16, 0x00	; 0
 TDO 0000_0000_0001_1000 = 0018, L: 16 

INST: CMD 0xa (avr instruction)
 TDI 1011_1001_0000_1101 = b90d, L: 16 	out	0x0d, r16	; 13
 TDO 0000_0000_0001_1010 = 001a, L: 16 

INST: CMD 0xa (avr instruction)
 TDI 1110_1111_0000_1111 = ef0f, L: 16 	ldi	r16, 0xFF	; 255
 TDO 0000_0000_0001_1100 = 001c, L: 16 

INST: CMD 0xa (avr instruction)
 TDI 1011_1011_0000_0000 = bb00, L: 16 	out	0x10, r16	; 16
 TDO 0000_0000_0001_1110 = 001e, L: 16 

INST: CMD 0xa (avr instruction)
 TDI 1110_0000_0000_0000 = e000, L: 16 	ldi	r16, 0x00	; 0
 TDO 0000_0000_0010_0000 = 0020, L: 16 

INST: CMD 0xa (avr instruction)
 TDI 1011_1011_0000_0001 = bb01, L: 16 	out	0x11, r16	; 17
 TDO 0000_0000_0010_0010 = 0022, L: 16 

INST: CMD 0xa (avr instruction)
 TDI 1110_0000_0000_0000 = e000, L: 16 	ldi	r16, 0x00	; 0
 TDO 0000_0000_0010_0100 = 0024, L: 16 

INST: CMD 0xa (avr instruction)
 TDI 1011_1011_0000_0010 = bb02, L: 16 	out	0x12, r16	; 18
 TDO 0000_0000_0010_0110 = 0026, L: 16 

INST: CMD 0xa (avr instruction)
 TDI 1110_1100_0000_0011 = ec03, L: 16 	ldi	r16, 0xC3	; 195
 TDO 0000_0000_0010_1000 = 0028, L: 16 

INST: CMD 0xa (avr instruction)
 TDI 1011_1011_0000_0011 = bb03, L: 16 	out	0x13, r16	; 19
 TDO 0000_0000_0010_1010 = 002a, L: 16 

INST: CMD 0xa (avr instruction)
 TDI 1110_0000_0000_0000 = e000, L: 16 	ldi	r16, 0x00	; 0
 TDO 0000_0000_0010_1100 = 002c, L: 16 

INST: CMD 0xa (avr instruction)
 TDI 1011_1011_0000_0100 = bb04, L: 16 	out	0x14, r16	; 20
 TDO 0000_0000_0010_1110 = 002e, L: 16 

INST: CMD 0xa (avr instruction)
 TDI 1110_0000_0000_0000 = e000, L: 16 	ldi	r16, 0x00	; 0
 TDO 0000_0000_0011_0000 = 0030, L: 16 

INST: CMD 0xa (avr instruction)
 TDI 1011_1011_0000_0101 = bb05, L: 16 	out	0x15, r16	; 21
 TDO 0000_0000_0011_0010 = 0032, L: 16 

INST: CMD 0xa (avr instruction)
 TDI 1110_1111_0000_1111 = ef0f, L: 16 	ldi	r16, 0xFF	; 255
 TDO 0000_0000_0011_0100 = 0034, L: 16 

INST: CMD 0xa (avr instruction)
 TDI 1011_1011_0000_0110 = bb06, L: 16 	out	0x16, r16	; 22
 TDO 0000_0000_0011_0110 = 0036, L: 16 

INST: CMD 0xa (avr instruction)
 TDI 1110_0000_0000_0000 = e000, L: 16 	ldi	r16, 0x00	; 0
 TDO 0000_0000_0011_1000 = 0038, L: 16 

INST: CMD 0xa (avr instruction)
 TDI 1011_1011_0000_0111 = bb07, L: 16 	out	0x17, r16	; 23
 TDO 0000_0000_0011_1010 = 003a, L: 16 

INST: CMD 0xa (avr instruction)
 TDI 1110_0000_0000_0000 = e000, L: 16 	ldi	r16, 0x00	; 0
 TDO 0000_0000_0011_1100 = 003c, L: 16 

INST: CMD 0xa (avr instruction)
 TDI 1011_1011_0000_1000 = bb08, L: 16 	out	0x18, r16	; 24
 TDO 0000_0000_0011_1110 = 003e, L: 16 

INST: CMD 0xa (avr instruction)
 TDI 1110_1111_0000_1111 = ef0f, L: 16 	ldi	r16, 0xFF	; 255
 TDO 0000_0000_0100_0000 = 0040, L: 16 

INST: CMD 0xa (avr instruction)
 TDI 1011_1011_0000_1001 = bb09, L: 16 	out	0x19, r16	; 25
 TDO 0000_0000_0100_0010 = 0042, L: 16 

INST: CMD 0xa (avr instruction)
 TDI 1110_0000_0000_0000 = e000, L: 16 	ldi	r16, 0x00	; 0
 TDO 0000_0000_0100_0100 = 0044, L: 16 

INST: CMD 0xa (avr instruction)
 TDI 1011_1011_0000_1010 = bb0a, L: 16 	out	0x1a, r16	; 26
 TDO 0000_0000_0100_0110 = 0046, L: 16 

INST: CMD 0xa (avr instruction)
 TDI 1110_0000_0000_0000 = e000, L: 16 	ldi	r16, 0x00	; 0
 TDO 0000_0000_0100_1000 = 0048, L: 16 

INST: CMD 0xa (avr instruction)
 TDI 1011_1011_0000_1011 = bb0b, L: 16 	out	0x1b, r16	; 27
 TDO 0000_0000_0100_1010 = 004a, L: 16 

INST: CMD 0xa (avr instruction)
 TDI 1110_0000_0000_0000 = e000, L: 16 	ldi	r16, 0x00	; 0
 TDO 0000_0000_0100_1100 = 004c, L: 16 

INST: CMD 0xa (avr instruction)
 TDI 1011_1011_0000_1100 = bb0c, L: 16 	out	0x1c, r16	; 28
 TDO 0000_0000_0100_1110 = 004e, L: 16 

INST: CMD 0xa (avr instruction)
 TDI 1110_0000_0000_0000 = e000, L: 16 	ldi	r16, 0x00	; 0
 TDO 0000_0000_0101_0000 = 0050, L: 16 

INST: CMD 0xa (avr instruction)
 TDI 1011_1011_0000_1101 = bb0d, L: 16 	out	0x1d, r16	; 29
 TDO 0000_0000_0101_0010 = 0052, L: 16 

INST: CMD 0xa (avr instruction)
 TDI 1110_0001_0000_1111 = e10f, L: 16 	ldi	r16, 0x1F	; 31
 TDO 0000_0000_0101_0100 = 0054, L: 16 

INST: CMD 0xa (avr instruction)
 TDI 1011_1011_0000_1110 = bb0e, L: 16 	out	0x1e, r16	; 30
 TDO 0000_0000_0101_0110 = 0056, L: 16 

INST: CMD 0xa (avr instruction)
 TDI 1110_0000_0000_0000 = e000, L: 16 	ldi	r16, 0x00	; 0
 TDO 0000_0000_0101_1000 = 0058, L: 16 

INST: CMD 0xa (avr instruction)
 TDI 1011_1011_0000_1111 = bb0f, L: 16 	out	0x1f, r16	; 31
 TDO 0000_0000_0101_1010 = 005a, L: 16 

INST: CMD 0xa (avr instruction)
 TDI 1110_0000_0000_0000 = e000, L: 16 	ldi	r16, 0x00	; 0
 TDO 0000_0000_0101_1100 = 005c, L: 16 

INST: CMD 0xa (avr instruction)
 TDI 1011_1101_0000_0001 = bd01, L: 16 	out	0x21, r16	; 33
 TDO 0000_0000_0101_1110 = 005e, L: 16 

INST: CMD 0xa (avr instruction)
 TDI 1110_0000_0000_0000 = e000, L: 16 	ldi	r16, 0x00	; 0
 TDO 0000_0000_0110_0000 = 0060, L: 16 

INST: CMD 0xa (avr instruction)
 TDI 1011_1101_0000_0010 = bd02, L: 16 	out	0x22, r16	; 34
 TDO 0000_0000_0110_0010 = 0062, L: 16 

INST: CMD 0xa (avr instruction)
 TDI 1110_0000_0000_0000 = e000, L: 16 	ldi	r16, 0x00	; 0
 TDO 0000_0000_0110_0100 = 0064, L: 16 

INST: CMD 0xa (avr instruction)
 TDI 1011_1101_0000_0011 = bd03, L: 16 	out	0x23, r16	; 35
 TDO 0000_0000_0110_0110 = 0066, L: 16 

INST: CMD 0xa (avr instruction)
 TDI 1110_0000_0000_0000 = e000, L: 16 	ldi	r16, 0x00	; 0
 TDO 0000_0000_0110_1000 = 0068, L: 16 

INST: CMD 0xa (avr instruction)
 TDI 1011_1101_0000_0100 = bd04, L: 16 	out	0x24, r16	; 36
 TDO 0000_0000_0110_1010 = 006a, L: 16 

INST: CMD 0xa (avr instruction)
 TDI 1110_0000_0000_0000 = e000, L: 16 	ldi	r16, 0x00	; 0
 TDO 0000_0000_0110_1100 = 006c, L: 16 

INST: CMD 0xa (avr instruction)
 TDI 1011_1101_0000_0101 = bd05, L: 16 	out	0x25, r16	; 37
 TDO 0000_0000_0110_1110 = 006e, L: 16 

INST: CMD 0xa (avr instruction)
 TDI 1110_0000_0000_0000 = e000, L: 16 	ldi	r16, 0x00	; 0
 TDO 0000_0000_0111_0000 = 0070, L: 16 

INST: CMD 0xa (avr instruction)
 TDI 1011_1101_0000_0110 = bd06, L: 16 	out	0x26, r16	; 38
 TDO 0000_0000_0111_0010 = 0072, L: 16 

INST: CMD 0xa (avr instruction)
 TDI 1110_0000_0000_0000 = e000, L: 16 	ldi	r16, 0x00	; 0
 TDO 0000_0000_0111_0100 = 0074, L: 16 

INST: CMD 0xa (avr instruction)
 TDI 1011_1101_0000_0111 = bd07, L: 16 	out	0x27, r16	; 39
 TDO 0000_0000_0111_0110 = 0076, L: 16 

INST: CMD 0xa (avr instruction)
 TDI 1110_0000_0000_0000 = e000, L: 16 	ldi	r16, 0x00	; 0
 TDO 0000_0000_0111_1000 = 0078, L: 16 

INST: CMD 0xa (avr instruction)
 TDI 1011_1101_0000_1000 = bd08, L: 16 	out	0x28, r16	; 40
 TDO 0000_0000_0111_1010 = 007a, L: 16 

INST: CMD 0xa (avr instruction)
 TDI 1110_0000_0000_0000 = e000, L: 16 	ldi	r16, 0x00	; 0
 TDO 0000_0000_0111_1100 = 007c, L: 16 

INST: CMD 0xa (avr instruction)
 TDI 1011_1101_0000_1001 = bd09, L: 16 	out	0x29, r16	; 41
 TDO 0000_0000_0111_1110 = 007e, L: 16 

INST: CMD 0xa (avr instruction)
 TDI 1110_0000_0000_0000 = e000, L: 16 	ldi	r16, 0x00	; 0
 TDO 0000_0000_1000_0000 = 0080, L: 16 

INST: CMD 0xa (avr instruction)
 TDI 1011_1101_0000_1010 = bd0a, L: 16 	out	0x2a, r16	; 42
 TDO 0000_0000_1000_0010 = 0082, L: 16 

INST: CMD 0xa (avr instruction)
 TDI 1110_0000_0000_0000 = e000, L: 16 	ldi	r16, 0x00	; 0
 TDO 0000_0000_1000_0100 = 0084, L: 16 

INST: CMD 0xa (avr instruction)
 TDI 1011_1101_0000_1011 = bd0b, L: 16 	out	0x2b, r16	; 43
 TDO 0000_0000_1000_0110 = 0086, L: 16 

INST: CMD 0xa (avr instruction)
 TDI 1110_0000_0000_0000 = e000, L: 16 	ldi	r16, 0x00	; 0
 TDO 0000_0000_1000_1000 = 0088, L: 16 

INST: CMD 0xa (avr instruction)
 TDI 1011_1101_0000_1100 = bd0c, L: 16 	out	0x2c, r16	; 44
 TDO 0000_0000_1000_1010 = 008a, L: 16 

INST: CMD 0xa (avr instruction)
 TDI 1110_0000_0000_0000 = e000, L: 16 	ldi	r16, 0x00	; 0
 TDO 0000_0000_1000_1100 = 008c, L: 16 

INST: CMD 0xa (avr instruction)
 TDI 1011_1101_0000_1101 = bd0d, L: 16 	out	0x2d, r16	; 45
 TDO 0000_0000_1000_1110 = 008e, L: 16 

INST: CMD 0xa (avr instruction)
 TDI 1110_0000_0000_0000 = e000, L: 16 	ldi	r16, 0x00	; 0
 TDO 0000_0000_1001_0000 = 0090, L: 16 

INST: CMD 0xa (avr instruction)
 TDI 1011_1101_0000_1110 = bd0e, L: 16 	out	0x2e, r16	; 46
 TDO 0000_0000_1001_0010 = 0092, L: 16 

INST: CMD 0xa (avr instruction)
 TDI 1110_0000_0000_0000 = e000, L: 16 	ldi	r16, 0x00	; 0
 TDO 0000_0000_1001_0100 = 0094, L: 16 

INST: CMD 0xa (avr instruction)
 TDI 1011_1101_0000_1111 = bd0f, L: 16 	out	0x2f, r16	; 47
 TDO 0000_0000_1001_0110 = 0096, L: 16 

INST: CMD 0xa (avr instruction)
 TDI 1110_0000_0000_0000 = e000, L: 16 	ldi	r16, 0x00	; 0
 TDO 0000_0000_1001_1000 = 0098, L: 16 

INST: CMD 0xa (avr instruction)
 TDI 1011_1111_0000_0000 = bf00, L: 16 	out	0x30, r16	; 48
 TDO 0000_0000_1001_1010 = 009a, L: 16 

INST: CMD 0xa (avr instruction)
 TDI 1110_1100_0000_1101 = ec0d, L: 16 	ldi	r16, 0xCD	; 205
 TDO 0000_0000_1001_1100 = 009c, L: 16 

INST: CMD 0xb (OCD ctrl and status)
 TDI 0_1101 = 0_d, L: 5 
 TDO 0_1100 = 0_c, L: 5 
 TDI 0_1101_0110_0011_1100_1000 = 0_d63c8, L: 21 
 TDO 0_1101_0000_0000_0000_1100 = 0_d000c, L: 21 
 TDI 1_1101_0000_0000_0000_1100 = 1_d000c, L: 21 
 TDO 0_1101_0000_0000_0000_1100 = 0_d000c, L: 21 

INST: CMD 0xa (avr instruction)
 TDI 1011_1111_0000_0001 = bf01, L: 16 	out	0x31, r16	; 49
 TDO 0000_0000_1001_1110 = 009e, L: 16 

INST: CMD 0xb (OCD ctrl and status)
 TDI 0_1100 = 0_c, L: 5 
 TDO 0_1100 = 0_c, L: 5 
 TDI 0000_0000_0000_0000 = 0000, L: 16 
 TDO 1110_1000_0000_0000 = e800, L: 16 

INST: CMD 0xb (OCD ctrl and status)
 TDI 0_1101 = 0_d, L: 5 
 TDO 0_0000 = 0_0, L: 5 
 TDI 0_1101_0000_0000_0000_0000 = 0_d0000, L: 21 
 TDO 0_1101_0000_0000_0000_1100 = 0_d000c, L: 21 
 TDI 1_1101_1000_0000_0000_1100 = 1_d800c, L: 21 
 TDO 0_1101_0000_0000_0000_1100 = 0_d000c, L: 21 

INST: CMD 0xa (avr instruction)
 TDI 1110_0000_0000_0000 = e000, L: 16 	ldi	r16, 0x00	; 0
 TDO 0000_0000_1010_0000 = 00a0, L: 16 

INST: CMD 0xa (avr instruction)
 TDI 1011_1111_0000_0010 = bf02, L: 16 	out	0x32, r16	; 50
 TDO 0000_0000_1010_0010 = 00a2, L: 16 

INST: CMD 0xa (avr instruction)
 TDI 1110_0000_0000_0000 = e000, L: 16 	ldi	r16, 0x00	; 0
 TDO 0000_0000_1010_0100 = 00a4, L: 16 

INST: CMD 0xa (avr instruction)
 TDI 1011_1111_0000_0011 = bf03, L: 16 	out	0x33, r16	; 51
 TDO 0000_0000_1010_0110 = 00a6, L: 16 

INST: CMD 0xa (avr instruction)
 TDI 1110_0001_0000_0011 = e103, L: 16 	ldi	r16, 0x13	; 19
 TDO 0000_0000_1010_1000 = 00a8, L: 16 

INST: CMD 0xa (avr instruction)
 TDI 1011_1111_0000_0100 = bf04, L: 16 	out	0x34, r16	; 52
 TDO 0000_0000_1010_1010 = 00aa, L: 16 

INST: CMD 0xa (avr instruction)
 TDI 1110_0000_0000_0000 = e000, L: 16 	ldi	r16, 0x00	; 0
 TDO 0000_0000_1010_1100 = 00ac, L: 16 

INST: CMD 0xa (avr instruction)
 TDI 1011_1111_0000_0101 = bf05, L: 16 	out	0x35, r16	; 53
 TDO 0000_0000_1010_1110 = 00ae, L: 16 

INST: CMD 0xa (avr instruction)
 TDI 1110_0000_0000_0000 = e000, L: 16 	ldi	r16, 0x00	; 0
 TDO 0000_0000_1011_0000 = 00b0, L: 16 

INST: CMD 0xa (avr instruction)
 TDI 1011_1111_0000_1001 = bf09, L: 16 	out	0x39, r16	; 57
 TDO 0000_0000_1011_0010 = 00b2, L: 16 

INST: CMD 0xa (avr instruction)
 TDI 1110_0000_0000_0000 = e000, L: 16 	ldi	r16, 0x00	; 0
 TDO 0000_0000_1011_0100 = 00b4, L: 16 

INST: CMD 0xa (avr instruction)
 TDI 1011_1111_0000_1011 = bf0b, L: 16 	out	0x3b, r16	; 59
 TDO 0000_0000_1011_0110 = 00b6, L: 16 

INST: CMD 0xa (avr instruction)
 TDI 1110_0000_0000_0000 = e000, L: 16 	ldi	r16, 0x00	; 0
 TDO 0000_0000_1011_1000 = 00b8, L: 16 

INST: CMD 0xa (avr instruction)
 TDI 1011_1111_0000_1100 = bf0c, L: 16 	out	0x3c, r16	; 60
 TDO 0000_0000_1011_1010 = 00ba, L: 16 

INST: CMD 0xa (avr instruction)
 TDI 1110_0000_0000_0000 = e000, L: 16 	ldi	r16, 0x00	; 0
 TDO 0000_0000_1011_1100 = 00bc, L: 16 

INST: CMD 0xa (avr instruction)
 TDI 1011_1111_0000_1101 = bf0d, L: 16 	out	0x3d, r16	; 61
 TDO 0000_0000_1011_1110 = 00be, L: 16 

INST: CMD 0xa (avr instruction)
 TDI 1110_0000_0000_0000 = e000, L: 16 	ldi	r16, 0x00	; 0
 TDO 0000_0000_1100_0000 = 00c0, L: 16 

INST: CMD 0xa (avr instruction)
 TDI 1011_1111_0000_1110 = bf0e, L: 16 	out	0x3e, r16	; 62
 TDO 0000_0000_1100_0010 = 00c2, L: 16 

INST: CMD 0xa (avr instruction)
 TDI 1110_0000_0000_0000 = e000, L: 16 	ldi	r16, 0x00	; 0
 TDO 0000_0000_1100_0100 = 00c4, L: 16 

INST: CMD 0xa (avr instruction)
 TDI 1011_1111_0000_1111 = bf0f, L: 16 	out	0x3f, r16	; 63
 TDO 0000_0000_1100_0110 = 00c6, L: 16 

INST: CMD 0xb (OCD ctrl and status)
 TDI 0_1101 = 0_d, L: 5 
 TDO 0_1100 = 0_c, L: 5 
 TDI 0_1101_1111_1011_0000_0100 = 0_dfb04, L: 21 
 TDO 0_1101_1000_0000_0000_1100 = 0_d800c, L: 21 
 TDI 1_1101_1100_0000_0000_1100 = 1_dc00c, L: 21 
 TDO 0_1101_1000_0000_0000_1100 = 0_d800c, L: 21 

INST: CMD 0xa (avr instruction)
 TDI 1110_0000_0000_0000 = e000, L: 16 	ldi	r16, 0x00	; 0
 TDO 0000_0000_1100_1000 = 00c8, L: 16 

INST: CMD 0xa (avr instruction)
 TDI 1011_1101_0000_1000 = bd08, L: 16 	out	0x28, r16	; 40
 TDO 0000_0000_1100_1010 = 00ca, L: 16 

INST: CMD 0xa (avr instruction)
 TDI 1110_0000_0000_0000 = e000, L: 16 	ldi	r16, 0x00	; 0
 TDO 0000_0000_1100_1100 = 00cc, L: 16 

INST: CMD 0xa (avr instruction)
 TDI 1011_1101_0000_1001 = bd09, L: 16 	out	0x29, r16	; 41
 TDO 0000_0000_1100_1110 = 00ce, L: 16 

INST: CMD 0xa (avr instruction)
 TDI 1110_0000_0000_0000 = e000, L: 16 	ldi	r16, 0x00	; 0
 TDO 0000_0000_1101_0000 = 00d0, L: 16 

INST: CMD 0xa (avr instruction)
 TDI 1011_1101_0000_1010 = bd0a, L: 16 	out	0x2a, r16	; 42
 TDO 0000_0000_1101_0010 = 00d2, L: 16 

INST: CMD 0xa (avr instruction)
 TDI 1110_0000_0000_0000 = e000, L: 16 	ldi	r16, 0x00	; 0
 TDO 0000_0000_1101_0100 = 00d4, L: 16 

INST: CMD 0xa (avr instruction)
 TDI 1011_1101_0000_1011 = bd0b, L: 16 	out	0x2b, r16	; 43
 TDO 0000_0000_1101_0110 = 00d6, L: 16 

INST: CMD 0xa (avr instruction)
 TDI 1110_0000_0000_0000 = e000, L: 16 	ldi	r16, 0x00	; 0
 TDO 0000_0000_1101_1000 = 00d8, L: 16 

INST: CMD 0xa (avr instruction)
 TDI 1011_1101_0000_1101 = bd0d, L: 16 	out	0x2d, r16	; 45
 TDO 0000_0000_1101_1010 = 00da, L: 16 

INST: CMD 0xa (avr instruction)
 TDI 1110_0000_0000_0000 = e000, L: 16 	ldi	r16, 0x00	; 0
 TDO 0000_0000_1101_1100 = 00dc, L: 16 

INST: CMD 0xa (avr instruction)
 TDI 0010_1110_0000_0000 = 2e00, L: 16 	mov	r0, r16
 TDO 0000_0000_1101_1110 = 00de, L: 16 

INST: CMD 0xa (avr instruction)
 TDI 1110_0000_0000_0001 = e001, L: 16 	ldi	r16, 0x01	; 1
 TDO 0000_0000_1110_0000 = 00e0, L: 16 

INST: CMD 0xa (avr instruction)
 TDI 0010_1110_0001_0000 = 2e10, L: 16 	mov	r1, r16
 TDO 0000_0000_1110_0010 = 00e2, L: 16 

INST: CMD 0xa (avr instruction)
 TDI 1110_0000_0000_0000 = e000, L: 16 	ldi	r16, 0x00	; 0
 TDO 0000_0000_1110_0100 = 00e4, L: 16 

INST: CMD 0xa (avr instruction)
 TDI 0010_1110_0010_0000 = 2e20, L: 16 	mov	r2, r16
 TDO 0000_0000_1110_0110 = 00e6, L: 16 

INST: CMD 0xa (avr instruction)
 TDI 1110_0000_0000_0000 = e000, L: 16 	ldi	r16, 0x00	; 0
 TDO 0000_0000_1110_1000 = 00e8, L: 16 

INST: CMD 0xa (avr instruction)
 TDI 0010_1110_0011_0000 = 2e30, L: 16 	mov	r3, r16
 TDO 0000_0000_1110_1010 = 00ea, L: 16 

INST: CMD 0xa (avr instruction)
 TDI 1110_0000_0000_0000 = e000, L: 16 	ldi	r16, 0x00	; 0
 TDO 0000_0000_1110_1100 = 00ec, L: 16 

INST: CMD 0xa (avr instruction)
 TDI 0010_1110_0100_0000 = 2e40, L: 16 	mov	r4, r16
 TDO 0000_0000_1110_1110 = 00ee, L: 16 

INST: CMD 0xa (avr instruction)
 TDI 1110_0000_0000_0000 = e000, L: 16 	ldi	r16, 0x00	; 0
 TDO 0000_0000_1111_0000 = 00f0, L: 16 

INST: CMD 0xa (avr instruction)
 TDI 0010_1110_0101_0000 = 2e50, L: 16 	mov	r5, r16
 TDO 0000_0000_1111_0010 = 00f2, L: 16 

INST: CMD 0xa (avr instruction)
 TDI 1110_0000_0000_0000 = e000, L: 16 	ldi	r16, 0x00	; 0
 TDO 0000_0000_1111_0100 = 00f4, L: 16 

INST: CMD 0xa (avr instruction)
 TDI 0010_1110_0110_0000 = 2e60, L: 16 	mov	r6, r16
 TDO 0000_0000_1111_0110 = 00f6, L: 16 

INST: CMD 0xa (avr instruction)
 TDI 1110_0001_0000_0010 = e102, L: 16 	ldi	r16, 0x12	; 18
 TDO 0000_0000_1111_1000 = 00f8, L: 16 

INST: CMD 0xa (avr instruction)
 TDI 0010_1110_0111_0000 = 2e70, L: 16 	mov	r7, r16
 TDO 0000_0000_1111_1010 = 00fa, L: 16 

INST: CMD 0xa (avr instruction)
 TDI 1110_0100_0000_0000 = e400, L: 16 	ldi	r16, 0x40	; 64
 TDO 0000_0000_1111_1100 = 00fc, L: 16 

INST: CMD 0xa (avr instruction)
 TDI 0010_1110_1000_0000 = 2e80, L: 16 	mov	r8, r16
 TDO 0000_0000_1111_1110 = 00fe, L: 16 

INST: CMD 0xa (avr instruction)
 TDI 1110_0000_0000_0000 = e000, L: 16 	ldi	r16, 0x00	; 0
 TDO 0000_0001_0000_0000 = 0100, L: 16 

INST: CMD 0xa (avr instruction)
 TDI 0010_1110_1001_0000 = 2e90, L: 16 	mov	r9, r16
 TDO 0000_0001_0000_0010 = 0102, L: 16 

INST: CMD 0xa (avr instruction)
 TDI 1110_0000_0000_0010 = e002, L: 16 	ldi	r16, 0x02	; 2
 TDO 0000_0001_0000_0100 = 0104, L: 16 

INST: CMD 0xa (avr instruction)
 TDI 0010_1110_1010_0000 = 2ea0, L: 16 	mov	r10, r16
 TDO 0000_0001_0000_0110 = 0106, L: 16 

INST: CMD 0xa (avr instruction)
 TDI 1110_0000_0000_0000 = e000, L: 16 	ldi	r16, 0x00	; 0
 TDO 0000_0001_0000_1000 = 0108, L: 16 

INST: CMD 0xa (avr instruction)
 TDI 0010_1110_1011_0000 = 2eb0, L: 16 	mov	r11, r16
 TDO 0000_0001_0000_1010 = 010a, L: 16 

INST: CMD 0xa (avr instruction)
 TDI 1110_0000_0000_0000 = e000, L: 16 	ldi	r16, 0x00	; 0
 TDO 0000_0001_0000_1100 = 010c, L: 16 

INST: CMD 0xa (avr instruction)
 TDI 0010_1110_1100_0000 = 2ec0, L: 16 	mov	r12, r16
 TDO 0000_0001_0000_1110 = 010e, L: 16 

INST: CMD 0xa (avr instruction)
 TDI 1110_0000_0000_1000 = e008, L: 16 	ldi	r16, 0x08	; 8
 TDO 0000_0001_0001_0000 = 0110, L: 16 

INST: CMD 0xa (avr instruction)
 TDI 0010_1110_1101_0000 = 2ed0, L: 16 	mov	r13, r16
 TDO 0000_0001_0001_0010 = 0112, L: 16 

INST: CMD 0xa (avr instruction)
 TDI 1110_0000_0000_0000 = e000, L: 16 	ldi	r16, 0x00	; 0
 TDO 0000_0001_0001_0100 = 0114, L: 16 

INST: CMD 0xa (avr instruction)
 TDI 0010_1110_1110_0000 = 2ee0, L: 16 	mov	r14, r16
 TDO 0000_0001_0001_0110 = 0116, L: 16 

INST: CMD 0xa (avr instruction)
 TDI 1110_0000_0000_0000 = e000, L: 16 	ldi	r16, 0x00	; 0
 TDO 0000_0001_0001_1000 = 0118, L: 16 

INST: CMD 0xa (avr instruction)
 TDI 0010_1110_1111_0000 = 2ef0, L: 16 	mov	r15, r16
 TDO 0000_0001_0001_1010 = 011a, L: 16 

INST: CMD 0xa (avr instruction)
 TDI 1110_1110_0000_1000 = ee08, L: 16 	ldi	r16, 0xE8	; 232
 TDO 0000_0001_0001_1100 = 011c, L: 16 

INST: CMD 0xa (avr instruction)
 TDI 1110_0001_0001_1111 = e11f, L: 16 	ldi	r17, 0x1F	; 31
 TDO 0000_0001_0001_1110 = 011e, L: 16 

INST: CMD 0xa (avr instruction)
 TDI 1110_0000_0010_0001 = e021, L: 16 	ldi	r18, 0x01	; 1
 TDO 0000_0001_0010_0000 = 0120, L: 16 

INST: CMD 0xa (avr instruction)
 TDI 1110_1000_0011_0000 = e830, L: 16 	ldi	r19, 0x80	; 128
 TDO 0000_0001_0010_0010 = 0122, L: 16 

INST: CMD 0xa (avr instruction)
 TDI 1110_0110_0100_0001 = e641, L: 16 	ldi	r20, 0x61	; 97
 TDO 0000_0001_0010_0100 = 0124, L: 16 

INST: CMD 0xa (avr instruction)
 TDI 1110_0000_0101_1001 = e059, L: 16 	ldi	r21, 0x09	; 9
 TDO 0000_0001_0010_0110 = 0126, L: 16 

INST: CMD 0xa (avr instruction)
 TDI 1110_1000_0110_0000 = e860, L: 16 	ldi	r22, 0x80	; 128
 TDO 0000_0001_0010_1000 = 0128, L: 16 

INST: CMD 0xa (avr instruction)
 TDI 1110_0000_0111_0000 = e070, L: 16 	ldi	r23, 0x00	; 0
 TDO 0000_0001_0010_1010 = 012a, L: 16 

INST: CMD 0xa (avr instruction)
 TDI 1110_0000_1000_0000 = e080, L: 16 	ldi	r24, 0x00	; 0
 TDO 0000_0001_0010_1100 = 012c, L: 16 

INST: CMD 0xa (avr instruction)
 TDI 1110_0000_1001_0010 = e092, L: 16 	ldi	r25, 0x02	; 2
 TDO 0000_0001_0010_1110 = 012e, L: 16 

INST: CMD 0xa (avr instruction)
 TDI 1110_1111_1010_1011 = efab, L: 16 	ldi	r26, 0xFB	; 251
 TDO 0000_0001_0011_0000 = 0130, L: 16 

INST: CMD 0xa (avr instruction)
 TDI 1110_1011_1011_1011 = ebbb, L: 16 	ldi	r27, 0xBB	; 187
 TDO 0000_0001_0011_0010 = 0132, L: 16 

INST: CMD 0xa (avr instruction)
 TDI 1110_0000_1100_0000 = e0c0, L: 16 	ldi	r28, 0x00	; 0
 TDO 0000_0001_0011_0100 = 0134, L: 16 

INST: CMD 0xa (avr instruction)
 TDI 1110_0000_1101_0000 = e0d0, L: 16 	ldi	r29, 0x00	; 0
 TDO 0000_0001_0011_0110 = 0136, L: 16 

INST: CMD 0xa (avr instruction)
 TDI 1110_0111_1110_0011 = e7e3, L: 16 	ldi	r30, 0x73	; 115
 TDO 0000_0001_0011_1000 = 0138, L: 16 

INST: CMD 0xa (avr instruction)
 TDI 1110_0000_1111_0000 = e0f0, L: 16 	ldi	r31, 0x00	; 0
 TDO 0000_0001_0011_1010 = 013a, L: 16 

INST: CMD 0xa (avr instruction)
 TDI 1110_1111_1111_1111 = efff, L: 16 	ldi	r31, 0xFF	; 255
 TDO 0000_0001_0011_1100 = 013c, L: 16 

INST: CMD 0xa (avr instruction)
 TDI 1110_1111_1110_1011 = efeb, L: 16 	ldi	r30, 0xFB	; 251
 TDO 0000_0001_0011_1110 = 013e, L: 16 

INST: CMD 0xa (avr instruction)
 TDI 1001_0101_1010_1000 = 95a8, L: 16 	wdr
 TDO 0000_0001_0100_0000 = 0140, L: 16 

INST: CMD 0xa (avr instruction)
 TDI 1001_0100_0000_1001 = 9409, L: 16 	ijmp
 TDO 0000_0001_0100_0010 = 0142, L: 16 

INST: CMD 0xa (avr instruction)
 TDI 1110_0000_1111_0000 = e0f0, L: 16 	ldi	r31, 0x00	; 0
 TDO 0001_1111_1111_1100 = 1ffc, L: 16 

INST: CMD 0xa (avr instruction)
 TDI 1110_0111_1110_0011 = e7e3, L: 16 	ldi	r30, 0x73	; 115
 TDO 0001_1111_1111_1110 = 1ffe, L: 16 

INST: CMD 0xb (OCD ctrl and status)
 TDI 0_1101 = 0_d, L: 5 
 TDO 0_1100 = 0_c, L: 5 
 TDI 0_1101_1100_0000_0000_1100 = 0_dc00c, L: 21 
 TDO 0_1101_1100_0000_0000_1100 = 0_dc00c, L: 21 
 TDI 1_1101_1000_0000_0000_1100 = 1_d800c, L: 21 
 TDO 0_1101_1100_0000_0000_1100 = 0_dc00c, L: 21 

INST: CMD 0xb (OCD ctrl and status)
 TDI 0_1101 = 0_d, L: 5 
 TDO 0_1100 = 0_c, L: 5 
 TDI 0_1101_1000_0001_1010_0000 = 0_d81a0, L: 21 
 TDO 0_1101_1000_0000_0000_1100 = 0_d800c, L: 21 
 TDI 1_1101_0000_0000_0000_1100 = 1_d000c, L: 21 
 TDO 0_1101_1000_0000_0000_1100 = 0_d800c, L: 21 

INST: CMD 0x9 (go)

INST: CMD 0xb (OCD ctrl and status)
 TDI 0_1101 = 0_d, L: 5 
 TDO 0_1100 = 0_c, L: 5 
 TDI 0000_0000_0000_0000 = 0000, L: 16 
 TDO 0000_0000_0000_1100 = 000c, L: 16 

INST: CMD 0x8 (stop)

INST: CMD 0xa (avr instruction)
 TDI 1111_1111_1111_1111_0000_0000_0000_0100 = ffff0004, L: 32 	.word	0x0004	; ????
 TDO 1111_1111_1111_1111_0000_0000_0000_0100 = ffff0004, L: 32 

INST: CMD 0xb (OCD ctrl and status)
 TDI 0_1101 = 0_d, L: 5 
 TDO 0_0000 = 0_0, L: 5 
 TDI 0_1101_1000_0001_1010_0000 = 0_d81a0, L: 21 
 TDO 0_1101_0000_0000_0000_0100 = 0_d0004, L: 21 
 TDI 1_1101_1000_0000_0000_0100 = 1_d8004, L: 21 
 TDO 0_1101_0000_0000_0000_0100 = 0_d0004, L: 21 

INST: CMD 0xa (avr instruction)
 TDI 1011_1111_1110_0001 = bfe1, L: 16 	out	0x31, r30	; 49
 TDO 0000_0000_0000_0100 = 0004, L: 16 

INST: CMD 0xb (OCD ctrl and status)
 TDI 0_1100 = 0_c, L: 5 
 TDO 1_1100 = 1_c, L: 5 
 TDI 0000_0000_0000_0000 = 0000, L: 16 
 TDO 0111_0011_0000_0000 = 7300, L: 16 

INST: CMD 0xa (avr instruction)
 TDI 1011_1111_1111_0001 = bff1, L: 16 	out	0x31, r31	; 49
 TDO 0000_0000_0000_0110 = 0006, L: 16 

INST: CMD 0xb (OCD ctrl and status)
 TDI 0_1100 = 0_c, L: 5 
 TDO 0_0000 = 0_0, L: 5 
 TDI 0000_0000_0000_0000 = 0000, L: 16 
 TDO 0000_0000_0000_0000 = 0000, L: 16 

INST: CMD 0xb (OCD ctrl and status)
 TDI 0_1000 = 0_8, L: 5 
 TDO 0_0000 = 0_0, L: 5 
 TDI 0_1000_0111_1011_0000_0001 = 0_87b01, L: 21 
 TDO 0_1000_0100_0000_1001_0000 = 0_84090, L: 21 
 TDI 1_1000_0100_0000_0000_0000 = 1_84000, L: 21 
 TDO 0_1000_0100_0000_1001_0000 = 0_84090, L: 21 

INST: CMD 0xb (OCD ctrl and status)
 TDI 0_1001 = 0_9, L: 5 
 TDO 0_0000 = 0_0, L: 5 
 TDI 0_1001_0000_1101_0111_0011 = 0_90d73, L: 21 
 TDO 0_1001_0000_0000_0000_1000 = 0_90008, L: 21 

INST: CMD 0xb (OCD ctrl and status)
 TDI 0_1001 = 0_9, L: 5 
 TDO 0_1000 = 0_8, L: 5 
 TDI 0_1001_0000_1110_0111_0100 = 0_90e74, L: 21 
 TDO 0_1001_0000_0000_0000_1000 = 0_90008, L: 21 

INST: CMD 0xb (OCD ctrl and status)
 TDI 0_1101 = 0_d, L: 5 
 TDO 0_1000 = 0_8, L: 5 
 TDI 0_1101_0000_0100_0000_0001 = 0_d0401, L: 21 
 TDO 0_1101_1000_0000_0000_1100 = 0_d800c, L: 21 
 TDI 1_1101_1000_0000_0000_1100 = 1_d800c, L: 21 
 TDO 0_1101_1000_0000_0000_1100 = 0_d800c, L: 21 

INST: CMD 0xa (avr instruction)
 TDI 1011_1110_0000_0001 = be01, L: 16 	out	0x31, r0	; 49
 TDO 0000_0000_0000_1000 = 0008, L: 16 

INST: CMD 0xb (OCD ctrl and status)
 TDI 0_1100 = 0_c, L: 5 
 TDO 1_1100 = 1_c, L: 5 
 TDI 0000_0000_0000_0000 = 0000, L: 16 
 TDO 0000_0000_0000_0000 = 0000, L: 16 

INST: CMD 0xa (avr instruction)
 TDI 1011_1110_0001_0001 = be11, L: 16 	out	0x31, r1	; 49
 TDO 0000_0000_0000_1010 = 000a, L: 16 

INST: CMD 0xb (OCD ctrl and status)
 TDI 0_1100 = 0_c, L: 5 
 TDO 0_0000 = 0_0, L: 5 
 TDI 0000_0000_0000_0000 = 0000, L: 16 
 TDO 0000_0001_0000_0000 = 0100, L: 16 

INST: CMD 0xa (avr instruction)
 TDI 1011_1110_0010_0001 = be21, L: 16 	out	0x31, r2	; 49
 TDO 0000_0000_0000_1100 = 000c, L: 16 

INST: CMD 0xb (OCD ctrl and status)
 TDI 0_1100 = 0_c, L: 5 
 TDO 0_0000 = 0_0, L: 5 
 TDI 0000_0000_0000_0000 = 0000, L: 16 
 TDO 0000_0000_0000_0000 = 0000, L: 16 

INST: CMD 0xa (avr instruction)
 TDI 1011_1110_0011_0001 = be31, L: 16 	out	0x31, r3	; 49
 TDO 0000_0000_0000_1110 = 000e, L: 16 

INST: CMD 0xb (OCD ctrl and status)
 TDI 0_1100 = 0_c, L: 5 
 TDO 0_0000 = 0_0, L: 5 
 TDI 0000_0000_0000_0000 = 0000, L: 16 
 TDO 0000_0000_0000_0000 = 0000, L: 16 

INST: CMD 0xa (avr instruction)
 TDI 1011_1110_0100_0001 = be41, L: 16 	out	0x31, r4	; 49
 TDO 0000_0000_0001_0000 = 0010, L: 16 

INST: CMD 0xb (OCD ctrl and status)
 TDI 0_1100 = 0_c, L: 5 
 TDO 0_0000 = 0_0, L: 5 
 TDI 0000_0000_0000_0000 = 0000, L: 16 
 TDO 0000_0000_0000_0000 = 0000, L: 16 

INST: CMD 0xa (avr instruction)
 TDI 1011_1110_0101_0001 = be51, L: 16 	out	0x31, r5	; 49
 TDO 0000_0000_0001_0010 = 0012, L: 16 

INST: CMD 0xb (OCD ctrl and status)
 TDI 0_1100 = 0_c, L: 5 
 TDO 0_0000 = 0_0, L: 5 
 TDI 0000_0000_0000_0000 = 0000, L: 16 
 TDO 0000_0000_0000_0000 = 0000, L: 16 

INST: CMD 0xa (avr instruction)
 TDI 1011_1110_0110_0001 = be61, L: 16 	out	0x31, r6	; 49
 TDO 0000_0000_0001_0100 = 0014, L: 16 

INST: CMD 0xb (OCD ctrl and status)
 TDI 0_1100 = 0_c, L: 5 
 TDO 0_0000 = 0_0, L: 5 
 TDI 0000_0000_0000_0000 = 0000, L: 16 
 TDO 0000_0000_0000_0000 = 0000, L: 16 

INST: CMD 0xa (avr instruction)
 TDI 1011_1110_0111_0001 = be71, L: 16 	out	0x31, r7	; 49
 TDO 0000_0000_0001_0110 = 0016, L: 16 

INST: CMD 0xb (OCD ctrl and status)
 TDI 0_1100 = 0_c, L: 5 
 TDO 0_0000 = 0_0, L: 5 
 TDI 0000_0000_0000_0000 = 0000, L: 16 
 TDO 0001_0010_0000_0000 = 1200, L: 16 

INST: CMD 0xa (avr instruction)
 TDI 1011_1110_1000_0001 = be81, L: 16 	out	0x31, r8	; 49
 TDO 0000_0000_0001_1000 = 0018, L: 16 

INST: CMD 0xb (OCD ctrl and status)
 TDI 0_1100 = 0_c, L: 5 
 TDO 0_0000 = 0_0, L: 5 
 TDI 0000_0000_0000_0000 = 0000, L: 16 
 TDO 0100_0000_0000_0000 = 4000, L: 16 

INST: CMD 0xa (avr instruction)
 TDI 1011_1110_1001_0001 = be91, L: 16 	out	0x31, r9	; 49
 TDO 0000_0000_0001_1010 = 001a, L: 16 

INST: CMD 0xb (OCD ctrl and status)
 TDI 0_1100 = 0_c, L: 5 
 TDO 0_0000 = 0_0, L: 5 
 TDI 0000_0000_0000_0000 = 0000, L: 16 
 TDO 0000_0000_0000_0000 = 0000, L: 16 

INST: CMD 0xa (avr instruction)
 TDI 1011_1110_1010_0001 = bea1, L: 16 	out	0x31, r10	; 49
 TDO 0000_0000_0001_1100 = 001c, L: 16 

INST: CMD 0xb (OCD ctrl and status)
 TDI 0_1100 = 0_c, L: 5 
 TDO 0_0000 = 0_0, L: 5 
 TDI 0000_0000_0000_0000 = 0000, L: 16 
 TDO 0000_0010_0000_0000 = 0200, L: 16 

INST: CMD 0xa (avr instruction)
 TDI 1011_1110_1011_0001 = beb1, L: 16 	out	0x31, r11	; 49
 TDO 0000_0000_0001_1110 = 001e, L: 16 

INST: CMD 0xb (OCD ctrl and status)
 TDI 0_1100 = 0_c, L: 5 
 TDO 0_0000 = 0_0, L: 5 
 TDI 0000_0000_0000_0000 = 0000, L: 16 
 TDO 0000_0000_0000_0000 = 0000, L: 16 

INST: CMD 0xa (avr instruction)
 TDI 1011_1110_1100_0001 = bec1, L: 16 	out	0x31, r12	; 49
 TDO 0000_0000_0010_0000 = 0020, L: 16 

INST: CMD 0xb (OCD ctrl and status)
 TDI 0_1100 = 0_c, L: 5 
 TDO 0_0000 = 0_0, L: 5 
 TDI 0000_0000_0000_0000 = 0000, L: 16 
 TDO 0000_0000_0000_0000 = 0000, L: 16 

INST: CMD 0xa (avr instruction)
 TDI 1011_1110_1101_0001 = bed1, L: 16 	out	0x31, r13	; 49
 TDO 0000_0000_0010_0010 = 0022, L: 16 

INST: CMD 0xb (OCD ctrl and status)
 TDI 0_1100 = 0_c, L: 5 
 TDO 0_0000 = 0_0, L: 5 
 TDI 0000_0000_0000_0000 = 0000, L: 16 
 TDO 0000_1000_0000_0000 = 0800, L: 16 

INST: CMD 0xa (avr instruction)
 TDI 1011_1110_1110_0001 = bee1, L: 16 	out	0x31, r14	; 49
 TDO 0000_0000_0010_0100 = 0024, L: 16 

INST: CMD 0xb (OCD ctrl and status)
 TDI 0_1100 = 0_c, L: 5 
 TDO 0_0000 = 0_0, L: 5 
 TDI 0000_0000_0000_0000 = 0000, L: 16 
 TDO 0000_0000_0000_0000 = 0000, L: 16 

INST: CMD 0xa (avr instruction)
 TDI 1011_1110_1111_0001 = bef1, L: 16 	out	0x31, r15	; 49
 TDO 0000_0000_0010_0110 = 0026, L: 16 

INST: CMD 0xb (OCD ctrl and status)
 TDI 0_1100 = 0_c, L: 5 
 TDO 0_0000 = 0_0, L: 5 
 TDI 0000_0000_0000_0000 = 0000, L: 16 
 TDO 0000_0000_0000_0000 = 0000, L: 16 

INST: CMD 0xa (avr instruction)
 TDI 1011_1111_0000_0001 = bf01, L: 16 	out	0x31, r16	; 49
 TDO 0000_0000_0010_1000 = 0028, L: 16 

INST: CMD 0xb (OCD ctrl and status)
 TDI 0_1100 = 0_c, L: 5 
 TDO 0_0000 = 0_0, L: 5 
 TDI 0000_0000_0000_0000 = 0000, L: 16 
 TDO 0001_1111_0000_0000 = 1f00, L: 16 

INST: CMD 0xa (avr instruction)
 TDI 1011_1111_0001_0001 = bf11, L: 16 	out	0x31, r17	; 49
 TDO 0000_0000_0010_1010 = 002a, L: 16 

INST: CMD 0xb (OCD ctrl and status)
 TDI 0_1100 = 0_c, L: 5 
 TDO 0_0000 = 0_0, L: 5 
 TDI 0000_0000_0000_0000 = 0000, L: 16 
 TDO 0000_0001_0000_0000 = 0100, L: 16 

INST: CMD 0xa (avr instruction)
 TDI 1011_1111_0010_0001 = bf21, L: 16 	out	0x31, r18	; 49
 TDO 0000_0000_0010_1100 = 002c, L: 16 

INST: CMD 0xb (OCD ctrl and status)
 TDI 0_1100 = 0_c, L: 5 
 TDO 0_0000 = 0_0, L: 5 
 TDI 0000_0000_0000_0000 = 0000, L: 16 
 TDO 0000_0001_0000_0000 = 0100, L: 16 

INST: CMD 0xa (avr instruction)
 TDI 1011_1111_0011_0001 = bf31, L: 16 	out	0x31, r19	; 49
 TDO 0000_0000_0010_1110 = 002e, L: 16 

INST: CMD 0xb (OCD ctrl and status)
 TDI 0_1100 = 0_c, L: 5 
 TDO 0_0000 = 0_0, L: 5 
 TDI 0000_0000_0000_0000 = 0000, L: 16 
 TDO 1000_0000_0000_0000 = 8000, L: 16 

INST: CMD 0xa (avr instruction)
 TDI 1011_1111_0100_0001 = bf41, L: 16 	out	0x31, r20	; 49
 TDO 0000_0000_0011_0000 = 0030, L: 16 

INST: CMD 0xb (OCD ctrl and status)
 TDI 0_1100 = 0_c, L: 5 
 TDO 0_0000 = 0_0, L: 5 
 TDI 0000_0000_0000_0000 = 0000, L: 16 
 TDO 0110_0001_0000_0000 = 6100, L: 16 

INST: CMD 0xa (avr instruction)
 TDI 1011_1111_0101_0001 = bf51, L: 16 	out	0x31, r21	; 49
 TDO 0000_0000_0011_0010 = 0032, L: 16 

INST: CMD 0xb (OCD ctrl and status)
 TDI 0_1100 = 0_c, L: 5 
 TDO 0_0000 = 0_0, L: 5 
 TDI 0000_0000_0000_0000 = 0000, L: 16 
 TDO 0000_1001_0000_0000 = 0900, L: 16 

INST: CMD 0xa (avr instruction)
 TDI 1011_1111_0110_0001 = bf61, L: 16 	out	0x31, r22	; 49
 TDO 0000_0000_0011_0100 = 0034, L: 16 

INST: CMD 0xb (OCD ctrl and status)
 TDI 0_1100 = 0_c, L: 5 
 TDO 0_0000 = 0_0, L: 5 
 TDI 0000_0000_0000_0000 = 0000, L: 16 
 TDO 1000_0000_0000_0000 = 8000, L: 16 

INST: CMD 0xa (avr instruction)
 TDI 1011_1111_0111_0001 = bf71, L: 16 	out	0x31, r23	; 49
 TDO 0000_0000_0011_0110 = 0036, L: 16 

INST: CMD 0xb (OCD ctrl and status)
 TDI 0_1100 = 0_c, L: 5 
 TDO 0_0000 = 0_0, L: 5 
 TDI 0000_0000_0000_0000 = 0000, L: 16 
 TDO 0000_0000_0000_0000 = 0000, L: 16 

INST: CMD 0xa (avr instruction)
 TDI 1011_1111_1000_0001 = bf81, L: 16 	out	0x31, r24	; 49
 TDO 0000_0000_0011_1000 = 0038, L: 16 

INST: CMD 0xb (OCD ctrl and status)
 TDI 0_1100 = 0_c, L: 5 
 TDO 0_0000 = 0_0, L: 5 
 TDI 0000_0000_0000_0000 = 0000, L: 16 
 TDO 0000_0000_0000_0000 = 0000, L: 16 

INST: CMD 0xa (avr instruction)
 TDI 1011_1111_1001_0001 = bf91, L: 16 	out	0x31, r25	; 49
 TDO 0000_0000_0011_1010 = 003a, L: 16 

INST: CMD 0xb (OCD ctrl and status)
 TDI 0_1100 = 0_c, L: 5 
 TDO 0_0000 = 0_0, L: 5 
 TDI 0000_0000_0000_0000 = 0000, L: 16 
 TDO 0000_0010_0000_0000 = 0200, L: 16 

INST: CMD 0xa (avr instruction)
 TDI 1011_1111_1010_0001 = bfa1, L: 16 	out	0x31, r26	; 49
 TDO 0000_0000_0011_1100 = 003c, L: 16 

INST: CMD 0xb (OCD ctrl and status)
 TDI 0_1100 = 0_c, L: 5 
 TDO 0_0000 = 0_0, L: 5 
 TDI 0000_0000_0000_0000 = 0000, L: 16 
 TDO 1111_1011_0000_0000 = fb00, L: 16 

INST: CMD 0xa (avr instruction)
 TDI 1011_1111_1011_0001 = bfb1, L: 16 	out	0x31, r27	; 49
 TDO 0000_0000_0011_1110 = 003e, L: 16 

INST: CMD 0xb (OCD ctrl and status)
 TDI 0_1100 = 0_c, L: 5 
 TDO 0_0000 = 0_0, L: 5 
 TDI 0000_0000_0000_0000 = 0000, L: 16 
 TDO 1011_1011_0000_0000 = bb00, L: 16 

INST: CMD 0xa (avr instruction)
 TDI 1011_1111_1100_0001 = bfc1, L: 16 	out	0x31, r28	; 49
 TDO 0000_0000_0100_0000 = 0040, L: 16 

INST: CMD 0xb (OCD ctrl and status)
 TDI 0_1100 = 0_c, L: 5 
 TDO 0_0000 = 0_0, L: 5 
 TDI 0000_0000_0000_0000 = 0000, L: 16 
 TDO 0000_0000_0000_0000 = 0000, L: 16 

INST: CMD 0xa (avr instruction)
 TDI 1011_1111_1101_0001 = bfd1, L: 16 	out	0x31, r29	; 49
 TDO 0000_0000_0100_0010 = 0042, L: 16 

INST: CMD 0xb (OCD ctrl and status)
 TDI 0_1100 = 0_c, L: 5 
 TDO 0_0000 = 0_0, L: 5 
 TDI 0000_0000_0000_0000 = 0000, L: 16 
 TDO 0000_0000_0000_0000 = 0000, L: 16 

INST: CMD 0xa (avr instruction)
 TDI 1011_1111_1110_0001 = bfe1, L: 16 	out	0x31, r30	; 49
 TDO 0000_0000_0100_0100 = 0044, L: 16 

INST: CMD 0xb (OCD ctrl and status)
 TDI 0_1100 = 0_c, L: 5 
 TDO 0_0000 = 0_0, L: 5 
 TDI 0000_0000_0000_0000 = 0000, L: 16 
 TDO 0111_0011_0000_0000 = 7300, L: 16 

INST: CMD 0xa (avr instruction)
 TDI 1011_1111_1111_0001 = bff1, L: 16 	out	0x31, r31	; 49
 TDO 0000_0000_0100_0110 = 0046, L: 16 

INST: CMD 0xb (OCD ctrl and status)
 TDI 0_1100 = 0_c, L: 5 
 TDO 0_0000 = 0_0, L: 5 
 TDI 0000_0000_0000_0000 = 0000, L: 16 
 TDO 0000_0000_0000_0000 = 0000, L: 16 

INST: CMD 0xa (avr instruction)
 TDI 1011_0001_0000_0000 = b100, L: 16 	in	r16, 0x00	; 0
 TDO 0000_0000_0100_1000 = 0048, L: 16 

INST: CMD 0xa (avr instruction)
 TDI 1011_1111_0000_0001 = bf01, L: 16 	out	0x31, r16	; 49
 TDO 0000_0000_0100_1010 = 004a, L: 16 

INST: CMD 0xb (OCD ctrl and status)
 TDI 0_1100 = 0_c, L: 5 
 TDO 0_0000 = 0_0, L: 5 
 TDI 0000_0000_0000_0000 = 0000, L: 16 
 TDO 0000_0000_0000_0000 = 0000, L: 16 

INST: CMD 0xa (avr instruction)
 TDI 1011_0001_0000_0001 = b101, L: 16 	in	r16, 0x01	; 1
 TDO 0000_0000_0100_1100 = 004c, L: 16 

INST: CMD 0xa (avr instruction)
 TDI 1011_1111_0000_0001 = bf01, L: 16 	out	0x31, r16	; 49
 TDO 0000_0000_0100_1110 = 004e, L: 16 

INST: CMD 0xb (OCD ctrl and status)
 TDI 0_1100 = 0_c, L: 5 
 TDO 0_0000 = 0_0, L: 5 
 TDI 0000_0000_0000_0000 = 0000, L: 16 
 TDO 1111_1000_0000_0000 = f800, L: 16 

INST: CMD 0xa (avr instruction)
 TDI 1011_0001_0000_0010 = b102, L: 16 	in	r16, 0x02	; 2
 TDO 0000_0000_0101_0000 = 0050, L: 16 

INST: CMD 0xa (avr instruction)
 TDI 1011_1111_0000_0001 = bf01, L: 16 	out	0x31, r16	; 49
 TDO 0000_0000_0101_0010 = 0052, L: 16 

INST: CMD 0xb (OCD ctrl and status)
 TDI 0_1100 = 0_c, L: 5 
 TDO 0_0000 = 0_0, L: 5 
 TDI 0000_0000_0000_0000 = 0000, L: 16 
 TDO 1111_1110_0000_0000 = fe00, L: 16 

INST: CMD 0xa (avr instruction)
 TDI 1011_0001_0000_0011 = b103, L: 16 	in	r16, 0x03	; 3
 TDO 0000_0000_0101_0100 = 0054, L: 16 

INST: CMD 0xa (avr instruction)
 TDI 1011_1111_0000_0001 = bf01, L: 16 	out	0x31, r16	; 49
 TDO 0000_0000_0101_0110 = 0056, L: 16 

INST: CMD 0xb (OCD ctrl and status)
 TDI 0_1100 = 0_c, L: 5 
 TDO 0_0000 = 0_0, L: 5 
 TDI 0000_0000_0000_0000 = 0000, L: 16 
 TDO 1111_1111_0000_0000 = ff00, L: 16 

INST: CMD 0xa (avr instruction)
 TDI 1011_0001_0000_0110 = b106, L: 16 	in	r16, 0x06	; 6
 TDO 0000_0000_0101_1000 = 0058, L: 16 

INST: CMD 0xa (avr instruction)
 TDI 1011_1111_0000_0001 = bf01, L: 16 	out	0x31, r16	; 49
 TDO 0000_0000_0101_1010 = 005a, L: 16 

INST: CMD 0xb (OCD ctrl and status)
 TDI 0_1100 = 0_c, L: 5 
 TDO 0_0000 = 0_0, L: 5 
 TDI 0000_0000_0000_0000 = 0000, L: 16 
 TDO 0000_0000_0000_0000 = 0000, L: 16 

INST: CMD 0xa (avr instruction)
 TDI 1011_0001_0000_0111 = b107, L: 16 	in	r16, 0x07	; 7
 TDO 0000_0000_0101_1100 = 005c, L: 16 

INST: CMD 0xa (avr instruction)
 TDI 1011_1111_0000_0001 = bf01, L: 16 	out	0x31, r16	; 49
 TDO 0000_0000_0101_1110 = 005e, L: 16 

INST: CMD 0xb (OCD ctrl and status)
 TDI 0_1100 = 0_c, L: 5 
 TDO 0_0000 = 0_0, L: 5 
 TDI 0000_0000_0000_0000 = 0000, L: 16 
 TDO 0000_0000_0000_0000 = 0000, L: 16 

INST: CMD 0xa (avr instruction)
 TDI 1011_0001_0000_1000 = b108, L: 16 	in	r16, 0x08	; 8
 TDO 0000_0000_0110_0000 = 0060, L: 16 

INST: CMD 0xa (avr instruction)
 TDI 1011_1111_0000_0001 = bf01, L: 16 	out	0x31, r16	; 49
 TDO 0000_0000_0110_0010 = 0062, L: 16 

INST: CMD 0xb (OCD ctrl and status)
 TDI 0_1100 = 0_c, L: 5 
 TDO 0_0000 = 0_0, L: 5 
 TDI 0000_0000_0000_0000 = 0000, L: 16 
 TDO 0010_0000_0000_0000 = 2000, L: 16 

INST: CMD 0xa (avr instruction)
 TDI 1011_0001_0000_1001 = b109, L: 16 	in	r16, 0x09	; 9
 TDO 0000_0000_0110_0100 = 0064, L: 16 

INST: CMD 0xa (avr instruction)
 TDI 1011_1111_0000_0001 = bf01, L: 16 	out	0x31, r16	; 49
 TDO 0000_0000_0110_0110 = 0066, L: 16 

INST: CMD 0xb (OCD ctrl and status)
 TDI 0_1100 = 0_c, L: 5 
 TDO 0_0000 = 0_0, L: 5 
 TDI 0000_0000_0000_0000 = 0000, L: 16 
 TDO 0000_0000_0000_0000 = 0000, L: 16 

INST: CMD 0xa (avr instruction)
 TDI 1011_0001_0000_1010 = b10a, L: 16 	in	r16, 0x0a	; 10
 TDO 0000_0000_0110_1000 = 0068, L: 16 

INST: CMD 0xa (avr instruction)
 TDI 1011_1111_0000_0001 = bf01, L: 16 	out	0x31, r16	; 49
 TDO 0000_0000_0110_1010 = 006a, L: 16 

INST: CMD 0xb (OCD ctrl and status)
 TDI 0_1100 = 0_c, L: 5 
 TDO 0_0000 = 0_0, L: 5 
 TDI 0000_0000_0000_0000 = 0000, L: 16 
 TDO 0000_0000_0000_0000 = 0000, L: 16 

INST: CMD 0xa (avr instruction)
 TDI 1011_0001_0000_1011 = b10b, L: 16 	in	r16, 0x0b	; 11
 TDO 0000_0000_0110_1100 = 006c, L: 16 

INST: CMD 0xa (avr instruction)
 TDI 1011_1111_0000_0001 = bf01, L: 16 	out	0x31, r16	; 49
 TDO 0000_0000_0110_1110 = 006e, L: 16 

INST: CMD 0xb (OCD ctrl and status)
 TDI 0_1100 = 0_c, L: 5 
 TDO 0_0000 = 0_0, L: 5 
 TDI 0000_0000_0000_0000 = 0000, L: 16 
 TDO 0010_0000_0000_0000 = 2000, L: 16 

INST: CMD 0xa (avr instruction)
 TDI 1011_0001_0000_1101 = b10d, L: 16 	in	r16, 0x0d	; 13
 TDO 0000_0000_0111_0000 = 0070, L: 16 

INST: CMD 0xa (avr instruction)
 TDI 1011_1111_0000_0001 = bf01, L: 16 	out	0x31, r16	; 49
 TDO 0000_0000_0111_0010 = 0072, L: 16 

INST: CMD 0xb (OCD ctrl and status)
 TDI 0_1100 = 0_c, L: 5 
 TDO 0_0000 = 0_0, L: 5 
 TDI 0000_0000_0000_0000 = 0000, L: 16 
 TDO 0000_0000_0000_0000 = 0000, L: 16 

INST: CMD 0xa (avr instruction)
 TDI 1011_0001_0000_1111 = b10f, L: 16 	in	r16, 0x0f	; 15
 TDO 0000_0000_0111_0100 = 0074, L: 16 

INST: CMD 0xa (avr instruction)
 TDI 1011_1111_0000_0001 = bf01, L: 16 	out	0x31, r16	; 49
 TDO 0000_0000_0111_0110 = 0076, L: 16 

INST: CMD 0xb (OCD ctrl and status)
 TDI 0_1100 = 0_c, L: 5 
 TDO 0_0000 = 0_0, L: 5 
 TDI 0000_0000_0000_0000 = 0000, L: 16 
 TDO 0110_1000_0000_0000 = 6800, L: 16 

INST: CMD 0xa (avr instruction)
 TDI 1011_0011_0000_0000 = b300, L: 16 	in	r16, 0x10	; 16
 TDO 0000_0000_0111_1000 = 0078, L: 16 

INST: CMD 0xa (avr instruction)
 TDI 1011_1111_0000_0001 = bf01, L: 16 	out	0x31, r16	; 49
 TDO 0000_0000_0111_1010 = 007a, L: 16 

INST: CMD 0xb (OCD ctrl and status)
 TDI 0_1100 = 0_c, L: 5 
 TDO 0_0000 = 0_0, L: 5 
 TDI 0000_0000_0000_0000 = 0000, L: 16 
 TDO 1111_1111_0000_0000 = ff00, L: 16 

INST: CMD 0xa (avr instruction)
 TDI 1011_0011_0000_0001 = b301, L: 16 	in	r16, 0x11	; 17
 TDO 0000_0000_0111_1100 = 007c, L: 16 

INST: CMD 0xa (avr instruction)
 TDI 1011_1111_0000_0001 = bf01, L: 16 	out	0x31, r16	; 49
 TDO 0000_0000_0111_1110 = 007e, L: 16 

INST: CMD 0xb (OCD ctrl and status)
 TDI 0_1100 = 0_c, L: 5 
 TDO 0_0000 = 0_0, L: 5 
 TDI 0000_0000_0000_0000 = 0000, L: 16 
 TDO 0000_0000_0000_0000 = 0000, L: 16 

INST: CMD 0xa (avr instruction)
 TDI 1011_0011_0000_0010 = b302, L: 16 	in	r16, 0x12	; 18
 TDO 0000_0000_1000_0000 = 0080, L: 16 

INST: CMD 0xa (avr instruction)
 TDI 1011_1111_0000_0001 = bf01, L: 16 	out	0x31, r16	; 49
 TDO 0000_0000_1000_0010 = 0082, L: 16 

INST: CMD 0xb (OCD ctrl and status)
 TDI 0_1100 = 0_c, L: 5 
 TDO 0_0000 = 0_0, L: 5 
 TDI 0000_0000_0000_0000 = 0000, L: 16 
 TDO 0000_0000_0000_0000 = 0000, L: 16 

INST: CMD 0xa (avr instruction)
 TDI 1011_0011_0000_0011 = b303, L: 16 	in	r16, 0x13	; 19
 TDO 0000_0000_1000_0100 = 0084, L: 16 

INST: CMD 0xa (avr instruction)
 TDI 1011_1111_0000_0001 = bf01, L: 16 	out	0x31, r16	; 49
 TDO 0000_0000_1000_0110 = 0086, L: 16 

INST: CMD 0xb (OCD ctrl and status)
 TDI 0_1100 = 0_c, L: 5 
 TDO 0_0000 = 0_0, L: 5 
 TDI 0000_0000_0000_0000 = 0000, L: 16 
 TDO 1100_0011_0000_0000 = c300, L: 16 

INST: CMD 0xa (avr instruction)
 TDI 1011_0011_0000_0100 = b304, L: 16 	in	r16, 0x14	; 20
 TDO 0000_0000_1000_1000 = 0088, L: 16 

INST: CMD 0xa (avr instruction)
 TDI 1011_1111_0000_0001 = bf01, L: 16 	out	0x31, r16	; 49
 TDO 0000_0000_1000_1010 = 008a, L: 16 

INST: CMD 0xb (OCD ctrl and status)
 TDI 0_1100 = 0_c, L: 5 
 TDO 0_0000 = 0_0, L: 5 
 TDI 0000_0000_0000_0000 = 0000, L: 16 
 TDO 0000_0000_0000_0000 = 0000, L: 16 

INST: CMD 0xa (avr instruction)
 TDI 1011_0011_0000_0101 = b305, L: 16 	in	r16, 0x15	; 21
 TDO 0000_0000_1000_1100 = 008c, L: 16 

INST: CMD 0xa (avr instruction)
 TDI 1011_1111_0000_0001 = bf01, L: 16 	out	0x31, r16	; 49
 TDO 0000_0000_1000_1110 = 008e, L: 16 

INST: CMD 0xb (OCD ctrl and status)
 TDI 0_1100 = 0_c, L: 5 
 TDO 0_0000 = 0_0, L: 5 
 TDI 0000_0000_0000_0000 = 0000, L: 16 
 TDO 0000_0000_0000_0000 = 0000, L: 16 

INST: CMD 0xa (avr instruction)
 TDI 1011_0011_0000_0110 = b306, L: 16 	in	r16, 0x16	; 22
 TDO 0000_0000_1001_0000 = 0090, L: 16 

INST: CMD 0xa (avr instruction)
 TDI 1011_1111_0000_0001 = bf01, L: 16 	out	0x31, r16	; 49
 TDO 0000_0000_1001_0010 = 0092, L: 16 

INST: CMD 0xb (OCD ctrl and status)
 TDI 0_1100 = 0_c, L: 5 
 TDO 0_0000 = 0_0, L: 5 
 TDI 0000_0000_0000_0000 = 0000, L: 16 
 TDO 1111_1111_0000_0000 = ff00, L: 16 

INST: CMD 0xa (avr instruction)
 TDI 1011_0011_0000_0111 = b307, L: 16 	in	r16, 0x17	; 23
 TDO 0000_0000_1001_0100 = 0094, L: 16 

INST: CMD 0xa (avr instruction)
 TDI 1011_1111_0000_0001 = bf01, L: 16 	out	0x31, r16	; 49
 TDO 0000_0000_1001_0110 = 0096, L: 16 

INST: CMD 0xb (OCD ctrl and status)
 TDI 0_1100 = 0_c, L: 5 
 TDO 0_0000 = 0_0, L: 5 
 TDI 0000_0000_0000_0000 = 0000, L: 16 
 TDO 0000_0000_0000_0000 = 0000, L: 16 

INST: CMD 0xa (avr instruction)
 TDI 1011_0011_0000_1000 = b308, L: 16 	in	r16, 0x18	; 24
 TDO 0000_0000_1001_1000 = 0098, L: 16 

INST: CMD 0xa (avr instruction)
 TDI 1011_1111_0000_0001 = bf01, L: 16 	out	0x31, r16	; 49
 TDO 0000_0000_1001_1010 = 009a, L: 16 

INST: CMD 0xb (OCD ctrl and status)
 TDI 0_1100 = 0_c, L: 5 
 TDO 0_0000 = 0_0, L: 5 
 TDI 0000_0000_0000_0000 = 0000, L: 16 
 TDO 0000_0000_0000_0000 = 0000, L: 16 

INST: CMD 0xa (avr instruction)
 TDI 1011_0011_0000_1001 = b309, L: 16 	in	r16, 0x19	; 25
 TDO 0000_0000_1001_1100 = 009c, L: 16 

INST: CMD 0xa (avr instruction)
 TDI 1011_1111_0000_0001 = bf01, L: 16 	out	0x31, r16	; 49
 TDO 0000_0000_1001_1110 = 009e, L: 16 

INST: CMD 0xb (OCD ctrl and status)
 TDI 0_1100 = 0_c, L: 5 
 TDO 0_0000 = 0_0, L: 5 
 TDI 0000_0000_0000_0000 = 0000, L: 16 
 TDO 1111_1111_0000_0000 = ff00, L: 16 

INST: CMD 0xa (avr instruction)
 TDI 1011_0011_0000_1010 = b30a, L: 16 	in	r16, 0x1a	; 26
 TDO 0000_0000_1010_0000 = 00a0, L: 16 

INST: CMD 0xa (avr instruction)
 TDI 1011_1111_0000_0001 = bf01, L: 16 	out	0x31, r16	; 49
 TDO 0000_0000_1010_0010 = 00a2, L: 16 

INST: CMD 0xb (OCD ctrl and status)
 TDI 0_1100 = 0_c, L: 5 
 TDO 0_0000 = 0_0, L: 5 
 TDI 0000_0000_0000_0000 = 0000, L: 16 
 TDO 0000_0000_0000_0000 = 0000, L: 16 

INST: CMD 0xa (avr instruction)
 TDI 1011_0011_0000_1011 = b30b, L: 16 	in	r16, 0x1b	; 27
 TDO 0000_0000_1010_0100 = 00a4, L: 16 

INST: CMD 0xa (avr instruction)
 TDI 1011_1111_0000_0001 = bf01, L: 16 	out	0x31, r16	; 49
 TDO 0000_0000_1010_0110 = 00a6, L: 16 

INST: CMD 0xb (OCD ctrl and status)
 TDI 0_1100 = 0_c, L: 5 
 TDO 0_0000 = 0_0, L: 5 
 TDI 0000_0000_0000_0000 = 0000, L: 16 
 TDO 0000_0000_0000_0000 = 0000, L: 16 

INST: CMD 0xa (avr instruction)
 TDI 1011_0011_0000_1100 = b30c, L: 16 	in	r16, 0x1c	; 28
 TDO 0000_0000_1010_1000 = 00a8, L: 16 

INST: CMD 0xa (avr instruction)
 TDI 1011_1111_0000_0001 = bf01, L: 16 	out	0x31, r16	; 49
 TDO 0000_0000_1010_1010 = 00aa, L: 16 

INST: CMD 0xb (OCD ctrl and status)
 TDI 0_1100 = 0_c, L: 5 
 TDO 0_0000 = 0_0, L: 5 
 TDI 0000_0000_0000_0000 = 0000, L: 16 
 TDO 0000_0000_0000_0000 = 0000, L: 16 

INST: CMD 0xa (avr instruction)
 TDI 1011_0011_0000_1101 = b30d, L: 16 	in	r16, 0x1d	; 29
 TDO 0000_0000_1010_1100 = 00ac, L: 16 

INST: CMD 0xa (avr instruction)
 TDI 1011_1111_0000_0001 = bf01, L: 16 	out	0x31, r16	; 49
 TDO 0000_0000_1010_1110 = 00ae, L: 16 

INST: CMD 0xb (OCD ctrl and status)
 TDI 0_1100 = 0_c, L: 5 
 TDO 0_0000 = 0_0, L: 5 
 TDI 0000_0000_0000_0000 = 0000, L: 16 
 TDO 0000_0000_0000_0000 = 0000, L: 16 

INST: CMD 0xa (avr instruction)
 TDI 1011_0011_0000_1110 = b30e, L: 16 	in	r16, 0x1e	; 30
 TDO 0000_0000_1011_0000 = 00b0, L: 16 

INST: CMD 0xa (avr instruction)
 TDI 1011_1111_0000_0001 = bf01, L: 16 	out	0x31, r16	; 49
 TDO 0000_0000_1011_0010 = 00b2, L: 16 

INST: CMD 0xb (OCD ctrl and status)
 TDI 0_1100 = 0_c, L: 5 
 TDO 0_0000 = 0_0, L: 5 
 TDI 0000_0000_0000_0000 = 0000, L: 16 
 TDO 0001_1111_0000_0000 = 1f00, L: 16 

INST: CMD 0xa (avr instruction)
 TDI 1011_0011_0000_1111 = b30f, L: 16 	in	r16, 0x1f	; 31
 TDO 0000_0000_1011_0100 = 00b4, L: 16 

INST: CMD 0xa (avr instruction)
 TDI 1011_1111_0000_0001 = bf01, L: 16 	out	0x31, r16	; 49
 TDO 0000_0000_1011_0110 = 00b6, L: 16 

INST: CMD 0xb (OCD ctrl and status)
 TDI 0_1100 = 0_c, L: 5 
 TDO 0_0000 = 0_0, L: 5 
 TDI 0000_0000_0000_0000 = 0000, L: 16 
 TDO 0000_0000_0000_0000 = 0000, L: 16 

INST: CMD 0xa (avr instruction)
 TDI 1011_0101_0000_0001 = b501, L: 16 	in	r16, 0x21	; 33
 TDO 0000_0000_1011_1000 = 00b8, L: 16 

INST: CMD 0xa (avr instruction)
 TDI 1011_1111_0000_0001 = bf01, L: 16 	out	0x31, r16	; 49
 TDO 0000_0000_1011_1010 = 00ba, L: 16 

INST: CMD 0xb (OCD ctrl and status)
 TDI 0_1100 = 0_c, L: 5 
 TDO 0_0000 = 0_0, L: 5 
 TDI 0000_0000_0000_0000 = 0000, L: 16 
 TDO 0000_0000_0000_0000 = 0000, L: 16 

INST: CMD 0xa (avr instruction)
 TDI 1011_0101_0000_0010 = b502, L: 16 	in	r16, 0x22	; 34
 TDO 0000_0000_1011_1100 = 00bc, L: 16 

INST: CMD 0xa (avr instruction)
 TDI 1011_1111_0000_0001 = bf01, L: 16 	out	0x31, r16	; 49
 TDO 0000_0000_1011_1110 = 00be, L: 16 

INST: CMD 0xb (OCD ctrl and status)
 TDI 0_1100 = 0_c, L: 5 
 TDO 0_0000 = 0_0, L: 5 
 TDI 0000_0000_0000_0000 = 0000, L: 16 
 TDO 0000_0000_0000_0000 = 0000, L: 16 

INST: CMD 0xa (avr instruction)
 TDI 1011_0101_0000_0011 = b503, L: 16 	in	r16, 0x23	; 35
 TDO 0000_0000_1100_0000 = 00c0, L: 16 

INST: CMD 0xa (avr instruction)
 TDI 1011_1111_0000_0001 = bf01, L: 16 	out	0x31, r16	; 49
 TDO 0000_0000_1100_0010 = 00c2, L: 16 

INST: CMD 0xb (OCD ctrl and status)
 TDI 0_1100 = 0_c, L: 5 
 TDO 0_0000 = 0_0, L: 5 
 TDI 0000_0000_0000_0000 = 0000, L: 16 
 TDO 0000_0000_0000_0000 = 0000, L: 16 

INST: CMD 0xa (avr instruction)
 TDI 1011_0101_0000_0100 = b504, L: 16 	in	r16, 0x24	; 36
 TDO 0000_0000_1100_0100 = 00c4, L: 16 

INST: CMD 0xa (avr instruction)
 TDI 1011_1111_0000_0001 = bf01, L: 16 	out	0x31, r16	; 49
 TDO 0000_0000_1100_0110 = 00c6, L: 16 

INST: CMD 0xb (OCD ctrl and status)
 TDI 0_1100 = 0_c, L: 5 
 TDO 0_0000 = 0_0, L: 5 
 TDI 0000_0000_0000_0000 = 0000, L: 16 
 TDO 0000_0000_0000_0000 = 0000, L: 16 

INST: CMD 0xa (avr instruction)
 TDI 1011_0101_0000_0101 = b505, L: 16 	in	r16, 0x25	; 37
 TDO 0000_0000_1100_1000 = 00c8, L: 16 

INST: CMD 0xa (avr instruction)
 TDI 1011_1111_0000_0001 = bf01, L: 16 	out	0x31, r16	; 49
 TDO 0000_0000_1100_1010 = 00ca, L: 16 

INST: CMD 0xb (OCD ctrl and status)
 TDI 0_1100 = 0_c, L: 5 
 TDO 0_0000 = 0_0, L: 5 
 TDI 0000_0000_0000_0000 = 0000, L: 16 
 TDO 0000_0000_0000_0000 = 0000, L: 16 

INST: CMD 0xa (avr instruction)
 TDI 1011_0101_0000_0110 = b506, L: 16 	in	r16, 0x26	; 38
 TDO 0000_0000_1100_1100 = 00cc, L: 16 

INST: CMD 0xa (avr instruction)
 TDI 1011_1111_0000_0001 = bf01, L: 16 	out	0x31, r16	; 49
 TDO 0000_0000_1100_1110 = 00ce, L: 16 

INST: CMD 0xb (OCD ctrl and status)
 TDI 0_1100 = 0_c, L: 5 
 TDO 0_0000 = 0_0, L: 5 
 TDI 0000_0000_0000_0000 = 0000, L: 16 
 TDO 0000_0000_0000_0000 = 0000, L: 16 

INST: CMD 0xa (avr instruction)
 TDI 1011_0101_0000_0111 = b507, L: 16 	in	r16, 0x27	; 39
 TDO 0000_0000_1101_0000 = 00d0, L: 16 

INST: CMD 0xa (avr instruction)
 TDI 1011_1111_0000_0001 = bf01, L: 16 	out	0x31, r16	; 49
 TDO 0000_0000_1101_0010 = 00d2, L: 16 

INST: CMD 0xb (OCD ctrl and status)
 TDI 0_1100 = 0_c, L: 5 
 TDO 0_0000 = 0_0, L: 5 
 TDI 0000_0000_0000_0000 = 0000, L: 16 
 TDO 0000_0000_0000_0000 = 0000, L: 16 

INST: CMD 0xa (avr instruction)
 TDI 1011_0101_0000_1000 = b508, L: 16 	in	r16, 0x28	; 40
 TDO 0000_0000_1101_0100 = 00d4, L: 16 

INST: CMD 0xa (avr instruction)
 TDI 1011_1111_0000_0001 = bf01, L: 16 	out	0x31, r16	; 49
 TDO 0000_0000_1101_0110 = 00d6, L: 16 

INST: CMD 0xb (OCD ctrl and status)
 TDI 0_1100 = 0_c, L: 5 
 TDO 0_0000 = 0_0, L: 5 
 TDI 0000_0000_0000_0000 = 0000, L: 16 
 TDO 0000_0000_0000_0000 = 0000, L: 16 

INST: CMD 0xa (avr instruction)
 TDI 1011_0101_0000_1001 = b509, L: 16 	in	r16, 0x29	; 41
 TDO 0000_0000_1101_1000 = 00d8, L: 16 

INST: CMD 0xa (avr instruction)
 TDI 1011_1111_0000_0001 = bf01, L: 16 	out	0x31, r16	; 49
 TDO 0000_0000_1101_1010 = 00da, L: 16 

INST: CMD 0xb (OCD ctrl and status)
 TDI 0_1100 = 0_c, L: 5 
 TDO 0_0000 = 0_0, L: 5 
 TDI 0000_0000_0000_0000 = 0000, L: 16 
 TDO 0000_0000_0000_0000 = 0000, L: 16 

INST: CMD 0xa (avr instruction)
 TDI 1011_0101_0000_1010 = b50a, L: 16 	in	r16, 0x2a	; 42
 TDO 0000_0000_1101_1100 = 00dc, L: 16 

INST: CMD 0xa (avr instruction)
 TDI 1011_1111_0000_0001 = bf01, L: 16 	out	0x31, r16	; 49
 TDO 0000_0000_1101_1110 = 00de, L: 16 

INST: CMD 0xb (OCD ctrl and status)
 TDI 0_1100 = 0_c, L: 5 
 TDO 0_0000 = 0_0, L: 5 
 TDI 0000_0000_0000_0000 = 0000, L: 16 
 TDO 0000_0000_0000_0000 = 0000, L: 16 

INST: CMD 0xa (avr instruction)
 TDI 1011_0101_0000_1011 = b50b, L: 16 	in	r16, 0x2b	; 43
 TDO 0000_0000_1110_0000 = 00e0, L: 16 

INST: CMD 0xa (avr instruction)
 TDI 1011_1111_0000_0001 = bf01, L: 16 	out	0x31, r16	; 49
 TDO 0000_0000_1110_0010 = 00e2, L: 16 

INST: CMD 0xb (OCD ctrl and status)
 TDI 0_1100 = 0_c, L: 5 
 TDO 0_0000 = 0_0, L: 5 
 TDI 0000_0000_0000_0000 = 0000, L: 16 
 TDO 0000_0000_0000_0000 = 0000, L: 16 

INST: CMD 0xa (avr instruction)
 TDI 1011_0101_0000_1100 = b50c, L: 16 	in	r16, 0x2c	; 44
 TDO 0000_0000_1110_0100 = 00e4, L: 16 

INST: CMD 0xa (avr instruction)
 TDI 1011_1111_0000_0001 = bf01, L: 16 	out	0x31, r16	; 49
 TDO 0000_0000_1110_0110 = 00e6, L: 16 

INST: CMD 0xb (OCD ctrl and status)
 TDI 0_1100 = 0_c, L: 5 
 TDO 0_0000 = 0_0, L: 5 
 TDI 0000_0000_0000_0000 = 0000, L: 16 
 TDO 0000_0000_0000_0000 = 0000, L: 16 

INST: CMD 0xa (avr instruction)
 TDI 1011_0101_0000_1101 = b50d, L: 16 	in	r16, 0x2d	; 45
 TDO 0000_0000_1110_1000 = 00e8, L: 16 

INST: CMD 0xa (avr instruction)
 TDI 1011_1111_0000_0001 = bf01, L: 16 	out	0x31, r16	; 49
 TDO 0000_0000_1110_1010 = 00ea, L: 16 

INST: CMD 0xb (OCD ctrl and status)
 TDI 0_1100 = 0_c, L: 5 
 TDO 0_0000 = 0_0, L: 5 
 TDI 0000_0000_0000_0000 = 0000, L: 16 
 TDO 0000_0000_0000_0000 = 0000, L: 16 

INST: CMD 0xa (avr instruction)
 TDI 1011_0101_0000_1110 = b50e, L: 16 	in	r16, 0x2e	; 46
 TDO 0000_0000_1110_1100 = 00ec, L: 16 

INST: CMD 0xa (avr instruction)
 TDI 1011_1111_0000_0001 = bf01, L: 16 	out	0x31, r16	; 49
 TDO 0000_0000_1110_1110 = 00ee, L: 16 

INST: CMD 0xb (OCD ctrl and status)
 TDI 0_1100 = 0_c, L: 5 
 TDO 0_0000 = 0_0, L: 5 
 TDI 0000_0000_0000_0000 = 0000, L: 16 
 TDO 0000_0000_0000_0000 = 0000, L: 16 

INST: CMD 0xa (avr instruction)
 TDI 1011_0101_0000_1111 = b50f, L: 16 	in	r16, 0x2f	; 47
 TDO 0000_0000_1111_0000 = 00f0, L: 16 

INST: CMD 0xa (avr instruction)
 TDI 1011_1111_0000_0001 = bf01, L: 16 	out	0x31, r16	; 49
 TDO 0000_0000_1111_0010 = 00f2, L: 16 

INST: CMD 0xb (OCD ctrl and status)
 TDI 0_1100 = 0_c, L: 5 
 TDO 0_0000 = 0_0, L: 5 
 TDI 0000_0000_0000_0000 = 0000, L: 16 
 TDO 0000_0000_0000_0000 = 0000, L: 16 

INST: CMD 0xa (avr instruction)
 TDI 1011_0111_0000_0000 = b700, L: 16 	in	r16, 0x30	; 48
 TDO 0000_0000_1111_0100 = 00f4, L: 16 

INST: CMD 0xa (avr instruction)
 TDI 1011_1111_0000_0001 = bf01, L: 16 	out	0x31, r16	; 49
 TDO 0000_0000_1111_0110 = 00f6, L: 16 

INST: CMD 0xb (OCD ctrl and status)
 TDI 0_1100 = 0_c, L: 5 
 TDO 0_0000 = 0_0, L: 5 
 TDI 0000_0000_0000_0000 = 0000, L: 16 
 TDO 0000_0000_0000_0000 = 0000, L: 16 

INST: CMD 0xb (OCD ctrl and status)
 TDI 0_1101 = 0_d, L: 5 
 TDO 0_0000 = 0_0, L: 5 
 TDI 0_1101_0000_0000_0000_0000 = 0_d0000, L: 21 
 TDO 0_1101_1000_0000_0000_1100 = 0_d800c, L: 21 
 TDI 1_1101_0000_0000_0000_1100 = 1_d000c, L: 21 
 TDO 0_1101_1000_0000_0000_1100 = 0_d800c, L: 21 

INST: CMD 0xa (avr instruction)
 TDI 1011_0111_0000_0001 = b701, L: 16 	in	r16, 0x31	; 49
 TDO 0000_0000_1111_1000 = 00f8, L: 16 

INST: CMD 0xb (OCD ctrl and status)
 TDI 0_1101 = 0_d, L: 5 
 TDO 0_1100 = 0_c, L: 5 
 TDI 0_1101_0110_0011_1100_1000 = 0_d63c8, L: 21 
 TDO 0_1101_0000_0000_0000_1100 = 0_d000c, L: 21 
 TDI 1_1101_1000_0000_0000_1100 = 1_d800c, L: 21 
 TDO 0_1101_0000_0000_0000_1100 = 0_d000c, L: 21 

INST: CMD 0xa (avr instruction)
 TDI 1011_1111_0000_0001 = bf01, L: 16 	out	0x31, r16	; 49
 TDO 0000_0000_1111_1010 = 00fa, L: 16 

INST: CMD 0xb (OCD ctrl and status)
 TDI 0_1100 = 0_c, L: 5 
 TDO 1_1100 = 1_c, L: 5 
 TDI 0000_0000_0000_0000 = 0000, L: 16 
 TDO 1100_1101_0000_0000 = cd00, L: 16 

INST: CMD 0xa (avr instruction)
 TDI 1011_0111_0000_0010 = b702, L: 16 	in	r16, 0x32	; 50
 TDO 0000_0000_1111_1100 = 00fc, L: 16 

INST: CMD 0xa (avr instruction)
 TDI 1011_1111_0000_0001 = bf01, L: 16 	out	0x31, r16	; 49
 TDO 0000_0000_1111_1110 = 00fe, L: 16 

INST: CMD 0xb (OCD ctrl and status)
 TDI 0_1100 = 0_c, L: 5 
 TDO 0_0000 = 0_0, L: 5 
 TDI 0000_0000_0000_0000 = 0000, L: 16 
 TDO 0000_0000_0000_0000 = 0000, L: 16 

INST: CMD 0xa (avr instruction)
 TDI 1011_0111_0000_0011 = b703, L: 16 	in	r16, 0x33	; 51
 TDO 0000_0001_0000_0000 = 0100, L: 16 

INST: CMD 0xa (avr instruction)
 TDI 1011_1111_0000_0001 = bf01, L: 16 	out	0x31, r16	; 49
 TDO 0000_0001_0000_0010 = 0102, L: 16 

INST: CMD 0xb (OCD ctrl and status)
 TDI 0_1100 = 0_c, L: 5 
 TDO 0_0000 = 0_0, L: 5 
 TDI 0000_0000_0000_0000 = 0000, L: 16 
 TDO 0000_0000_0000_0000 = 0000, L: 16 

INST: CMD 0xa (avr instruction)
 TDI 1011_0111_0000_0100 = b704, L: 16 	in	r16, 0x34	; 52
 TDO 0000_0001_0000_0100 = 0104, L: 16 

INST: CMD 0xa (avr instruction)
 TDI 1011_1111_0000_0001 = bf01, L: 16 	out	0x31, r16	; 49
 TDO 0000_0001_0000_0110 = 0106, L: 16 

INST: CMD 0xb (OCD ctrl and status)
 TDI 0_1100 = 0_c, L: 5 
 TDO 0_0000 = 0_0, L: 5 
 TDI 0000_0000_0000_0000 = 0000, L: 16 
 TDO 0001_0011_0000_0000 = 1300, L: 16 

INST: CMD 0xa (avr instruction)
 TDI 1011_0111_0000_0101 = b705, L: 16 	in	r16, 0x35	; 53
 TDO 0000_0001_0000_1000 = 0108, L: 16 

INST: CMD 0xa (avr instruction)
 TDI 1011_1111_0000_0001 = bf01, L: 16 	out	0x31, r16	; 49
 TDO 0000_0001_0000_1010 = 010a, L: 16 

INST: CMD 0xb (OCD ctrl and status)
 TDI 0_1100 = 0_c, L: 5 
 TDO 0_0000 = 0_0, L: 5 
 TDI 0000_0000_0000_0000 = 0000, L: 16 
 TDO 0000_0000_0000_0000 = 0000, L: 16 

INST: CMD 0xa (avr instruction)
 TDI 1011_0111_0000_0110 = b706, L: 16 	in	r16, 0x36	; 54
 TDO 0000_0001_0000_1100 = 010c, L: 16 

INST: CMD 0xa (avr instruction)
 TDI 1011_1111_0000_0001 = bf01, L: 16 	out	0x31, r16	; 49
 TDO 0000_0001_0000_1110 = 010e, L: 16 

INST: CMD 0xb (OCD ctrl and status)
 TDI 0_1100 = 0_c, L: 5 
 TDO 0_0000 = 0_0, L: 5 
 TDI 0000_0000_0000_0000 = 0000, L: 16 
 TDO 0000_0000_0000_0000 = 0000, L: 16 

INST: CMD 0xa (avr instruction)
 TDI 1011_0111_0000_0111 = b707, L: 16 	in	r16, 0x37	; 55
 TDO 0000_0001_0001_0000 = 0110, L: 16 

INST: CMD 0xa (avr instruction)
 TDI 1011_1111_0000_0001 = bf01, L: 16 	out	0x31, r16	; 49
 TDO 0000_0001_0001_0010 = 0112, L: 16 

INST: CMD 0xb (OCD ctrl and status)
 TDI 0_1100 = 0_c, L: 5 
 TDO 0_0000 = 0_0, L: 5 
 TDI 0000_0000_0000_0000 = 0000, L: 16 
 TDO 0000_0000_0000_0000 = 0000, L: 16 

INST: CMD 0xa (avr instruction)
 TDI 1011_0111_0000_1000 = b708, L: 16 	in	r16, 0x38	; 56
 TDO 0000_0001_0001_0100 = 0114, L: 16 

INST: CMD 0xa (avr instruction)
 TDI 1011_1111_0000_0001 = bf01, L: 16 	out	0x31, r16	; 49
 TDO 0000_0001_0001_0110 = 0116, L: 16 

INST: CMD 0xb (OCD ctrl and status)
 TDI 0_1100 = 0_c, L: 5 
 TDO 0_0000 = 0_0, L: 5 
 TDI 0000_0000_0000_0000 = 0000, L: 16 
 TDO 0000_0000_0000_0000 = 0000, L: 16 

INST: CMD 0xa (avr instruction)
 TDI 1011_0111_0000_1001 = b709, L: 16 	in	r16, 0x39	; 57
 TDO 0000_0001_0001_1000 = 0118, L: 16 

INST: CMD 0xa (avr instruction)
 TDI 1011_1111_0000_0001 = bf01, L: 16 	out	0x31, r16	; 49
 TDO 0000_0001_0001_1010 = 011a, L: 16 

INST: CMD 0xb (OCD ctrl and status)
 TDI 0_1100 = 0_c, L: 5 
 TDO 0_0000 = 0_0, L: 5 
 TDI 0000_0000_0000_0000 = 0000, L: 16 
 TDO 0000_0000_0000_0000 = 0000, L: 16 

INST: CMD 0xa (avr instruction)
 TDI 1011_0111_0000_1010 = b70a, L: 16 	in	r16, 0x3a	; 58
 TDO 0000_0001_0001_1100 = 011c, L: 16 

INST: CMD 0xa (avr instruction)
 TDI 1011_1111_0000_0001 = bf01, L: 16 	out	0x31, r16	; 49
 TDO 0000_0001_0001_1110 = 011e, L: 16 

INST: CMD 0xb (OCD ctrl and status)
 TDI 0_1100 = 0_c, L: 5 
 TDO 0_0000 = 0_0, L: 5 
 TDI 0000_0000_0000_0000 = 0000, L: 16 
 TDO 0000_0000_0000_0000 = 0000, L: 16 

INST: CMD 0xa (avr instruction)
 TDI 1011_0111_0000_1011 = b70b, L: 16 	in	r16, 0x3b	; 59
 TDO 0000_0001_0010_0000 = 0120, L: 16 

INST: CMD 0xa (avr instruction)
 TDI 1011_1111_0000_0001 = bf01, L: 16 	out	0x31, r16	; 49
 TDO 0000_0001_0010_0010 = 0122, L: 16 

INST: CMD 0xb (OCD ctrl and status)
 TDI 0_1100 = 0_c, L: 5 
 TDO 0_0000 = 0_0, L: 5 
 TDI 0000_0000_0000_0000 = 0000, L: 16 
 TDO 0000_0000_0000_0000 = 0000, L: 16 

INST: CMD 0xa (avr instruction)
 TDI 1011_0111_0000_1100 = b70c, L: 16 	in	r16, 0x3c	; 60
 TDO 0000_0001_0010_0100 = 0124, L: 16 

INST: CMD 0xa (avr instruction)
 TDI 1011_1111_0000_0001 = bf01, L: 16 	out	0x31, r16	; 49
 TDO 0000_0001_0010_0110 = 0126, L: 16 

INST: CMD 0xb (OCD ctrl and status)
 TDI 0_1100 = 0_c, L: 5 
 TDO 0_0000 = 0_0, L: 5 
 TDI 0000_0000_0000_0000 = 0000, L: 16 
 TDO 0000_0000_0000_0000 = 0000, L: 16 

INST: CMD 0xa (avr instruction)
 TDI 1011_0111_0000_1101 = b70d, L: 16 	in	r16, 0x3d	; 61
 TDO 0000_0001_0010_1000 = 0128, L: 16 

INST: CMD 0xa (avr instruction)
 TDI 1011_1111_0000_0001 = bf01, L: 16 	out	0x31, r16	; 49
 TDO 0000_0001_0010_1010 = 012a, L: 16 

INST: CMD 0xb (OCD ctrl and status)
 TDI 0_1100 = 0_c, L: 5 
 TDO 0_0000 = 0_0, L: 5 
 TDI 0000_0000_0000_0000 = 0000, L: 16 
 TDO 0001_1111_0000_0000 = 1f00, L: 16 

INST: CMD 0xa (avr instruction)
 TDI 1011_0111_0000_1110 = b70e, L: 16 	in	r16, 0x3e	; 62
 TDO 0000_0001_0010_1100 = 012c, L: 16 

INST: CMD 0xa (avr instruction)
 TDI 1011_1111_0000_0001 = bf01, L: 16 	out	0x31, r16	; 49
 TDO 0000_0001_0010_1110 = 012e, L: 16 

INST: CMD 0xb (OCD ctrl and status)
 TDI 0_1100 = 0_c, L: 5 
 TDO 0_0000 = 0_0, L: 5 
 TDI 0000_0000_0000_0000 = 0000, L: 16 
 TDO 0000_0000_0000_0000 = 0000, L: 16 

INST: CMD 0xa (avr instruction)
 TDI 1011_0111_0000_1111 = b70f, L: 16 	in	r16, 0x3f	; 63
 TDO 0000_0001_0011_0000 = 0130, L: 16 

INST: CMD 0xa (avr instruction)
 TDI 1011_1111_0000_0001 = bf01, L: 16 	out	0x31, r16	; 49
 TDO 0000_0001_0011_0010 = 0132, L: 16 

INST: CMD 0xb (OCD ctrl and status)
 TDI 0_1100 = 0_c, L: 5 
 TDO 0_0000 = 0_0, L: 5 
 TDI 0000_0000_0000_0000 = 0000, L: 16 
 TDO 0000_0000_0000_0000 = 0000, L: 16 

INST: CMD 0xb (OCD ctrl and status)
 TDI 0_1000 = 0_8, L: 5 
 TDO 0_0000 = 0_0, L: 5 
 TDI 0_1000_0000_1111_0000_0100 = 0_80f04, L: 21 
 TDO 0_1000_0100_0000_0000_0000 = 0_84000, L: 21 
 TDI 1_1000_0100_0000_0000_0000 = 1_84000, L: 21 
 TDO 0_1000_0100_0000_0000_0000 = 0_84000, L: 21 

INST: CMD 0xb (OCD ctrl and status)
 TDI 0_1101 = 0_d, L: 5 
 TDO 0_0000 = 0_0, L: 5 
 TDI 0_1101_0100_0000_0000_0000 = 0_d4000, L: 21 
 TDO 0_1101_1000_0000_0000_1100 = 0_d800c, L: 21 
 TDI 1_1101_1100_0000_0000_1100 = 1_dc00c, L: 21 
 TDO 0_1101_1000_0000_0000_1100 = 0_d800c, L: 21 

INST: CMD 0xa (avr instruction)
 TDI 1011_0101_0000_1000 = b508, L: 16 	in	r16, 0x28	; 40
 TDO 0000_0001_0011_0100 = 0134, L: 16 

INST: CMD 0xa (avr instruction)
 TDI 1011_1111_0000_0001 = bf01, L: 16 	out	0x31, r16	; 49
 TDO 0000_0001_0011_0110 = 0136, L: 16 

INST: CMD 0xb (OCD ctrl and status)
 TDI 0_1100 = 0_c, L: 5 
 TDO 1_1100 = 1_c, L: 5 
 TDI 0000_0000_0000_0000 = 0000, L: 16 
 TDO 0000_0000_0000_0000 = 0000, L: 16 

INST: CMD 0xa (avr instruction)
 TDI 1011_0101_0000_1001 = b509, L: 16 	in	r16, 0x29	; 41
 TDO 0000_0001_0011_1000 = 0138, L: 16 

INST: CMD 0xa (avr instruction)
 TDI 1011_1111_0000_0001 = bf01, L: 16 	out	0x31, r16	; 49
 TDO 0000_0001_0011_1010 = 013a, L: 16 

INST: CMD 0xb (OCD ctrl and status)
 TDI 0_1100 = 0_c, L: 5 
 TDO 0_0000 = 0_0, L: 5 
 TDI 0000_0000_0000_0000 = 0000, L: 16 
 TDO 0000_0000_0000_0000 = 0000, L: 16 

INST: CMD 0xa (avr instruction)
 TDI 1011_0101_0000_1010 = b50a, L: 16 	in	r16, 0x2a	; 42
 TDO 0000_0001_0011_1100 = 013c, L: 16 

INST: CMD 0xa (avr instruction)
 TDI 1011_1111_0000_0001 = bf01, L: 16 	out	0x31, r16	; 49
 TDO 0000_0001_0011_1110 = 013e, L: 16 

INST: CMD 0xb (OCD ctrl and status)
 TDI 0_1100 = 0_c, L: 5 
 TDO 0_0000 = 0_0, L: 5 
 TDI 0000_0000_0000_0000 = 0000, L: 16 
 TDO 0000_0000_0000_0000 = 0000, L: 16 

INST: CMD 0xa (avr instruction)
 TDI 1011_0101_0000_1011 = b50b, L: 16 	in	r16, 0x2b	; 43
 TDO 0000_0001_0100_0000 = 0140, L: 16 

INST: CMD 0xa (avr instruction)
 TDI 1011_1111_0000_0001 = bf01, L: 16 	out	0x31, r16	; 49
 TDO 0000_0001_0100_0010 = 0142, L: 16 

INST: CMD 0xb (OCD ctrl and status)
 TDI 0_1100 = 0_c, L: 5 
 TDO 0_0000 = 0_0, L: 5 
 TDI 0000_0000_0000_0000 = 0000, L: 16 
 TDO 0000_0000_0000_0000 = 0000, L: 16 

INST: CMD 0xa (avr instruction)
 TDI 1011_0101_0000_1101 = b50d, L: 16 	in	r16, 0x2d	; 45
 TDO 0000_0001_0100_0100 = 0144, L: 16 

INST: CMD 0xa (avr instruction)
 TDI 1011_1111_0000_0001 = bf01, L: 16 	out	0x31, r16	; 49
 TDO 0000_0001_0100_0110 = 0146, L: 16 

INST: CMD 0xb (OCD ctrl and status)
 TDI 0_1100 = 0_c, L: 5 
 TDO 0_0000 = 0_0, L: 5 
 TDI 0000_0000_0000_0000 = 0000, L: 16 
 TDO 0000_0000_0000_0000 = 0000, L: 16 

INST: CMD 0xb (OCD ctrl and status)
 TDI 0_1101 = 0_d, L: 5 
 TDO 0_0000 = 0_0, L: 5 
 TDI 0_1101_1100_0000_0000_1100 = 0_dc00c, L: 21 
 TDO 0_1101_1100_0000_0000_1100 = 0_dc00c, L: 21 
 TDI 1_1101_1000_0000_0000_1100 = 1_d800c, L: 21 
 TDO 0_1101_1100_0000_0000_1100 = 0_dc00c, L: 21 

INST: CMD 0xb (OCD ctrl and status)
 TDI 0_1101 = 0_d, L: 5 
 TDO 0_1100 = 0_c, L: 5 
 TDI 0000_0000_0000_0000 = 0000, L: 16 
 TDO 1000_0000_0000_1100 = 800c, L: 16 

INST: CMD 0xb (OCD ctrl and status)
 TDI 0_1101 = 0_d, L: 5 
 TDO 0_0000 = 0_0, L: 5 
 TDI 0000_0000_0000_0000 = 0000, L: 16 
 TDO 1000_0000_0000_1100 = 800c, L: 16 

INST: CMD 0xb (OCD ctrl and status)
 TDI 0_1101 = 0_d, L: 5 
 TDO 0_0000 = 0_0, L: 5 
 TDI 0000_0000_0000_0000 = 0000, L: 16 
 TDO 1000_0000_0000_1100 = 800c, L: 16 

INST: CMD 0xa (avr instruction)
 TDI 1110_0000_0000_0000 = e000, L: 16 	ldi	r16, 0x00	; 0
 TDO 0000_0001_0100_1000 = 0148, L: 16 

INST: CMD 0xa (avr instruction)
 TDI 1110_0000_0001_0000 = e010, L: 16 	ldi	r17, 0x00	; 0
 TDO 0000_0001_0100_1010 = 014a, L: 16 

INST: CMD 0xa (avr instruction)
 TDI 1110_0000_0010_0001 = e021, L: 16 	ldi	r18, 0x01	; 1
 TDO 0000_0001_0100_1100 = 014c, L: 16 

INST: CMD 0xa (avr instruction)
 TDI 1011_1011_0000_1111 = bb0f, L: 16 	out	0x1f, r16	; 31
 TDO 0000_0001_0100_1110 = 014e, L: 16 

INST: CMD 0xa (avr instruction)
 TDI 1011_1011_0001_1110 = bb1e, L: 16 	out	0x1e, r17	; 30
 TDO 0000_0001_0101_0000 = 0150, L: 16 

INST: CMD 0xa (avr instruction)
 TDI 1011_1011_0010_1100 = bb2c, L: 16 	out	0x1c, r18	; 28
 TDO 0000_0001_0101_0010 = 0152, L: 16 

INST: CMD 0xa (avr instruction)
 TDI 1011_0011_0000_1101 = b30d, L: 16 	in	r16, 0x1d	; 29
 TDO 0000_0001_0101_0100 = 0154, L: 16 

INST: CMD 0xa (avr instruction)
 TDI 1011_1111_0000_0001 = bf01, L: 16 	out	0x31, r16	; 49
 TDO 0000_0001_0101_0110 = 0156, L: 16 

INST: CMD 0xb (OCD ctrl and status)
 TDI 0_1100 = 0_c, L: 5 
 TDO 0_0000 = 0_0, L: 5 
 TDI 0000_0000_0000_0000 = 0000, L: 16 
 TDO 1111_1111_0000_0000 = ff00, L: 16 

INST: CMD 0xa (avr instruction)
 TDI 1110_0000_0000_0000 = e000, L: 16 	ldi	r16, 0x00	; 0
 TDO 0000_0001_0101_1000 = 0158, L: 16 

INST: CMD 0xa (avr instruction)
 TDI 1110_0000_0001_0001 = e011, L: 16 	ldi	r17, 0x01	; 1
 TDO 0000_0001_0101_1010 = 015a, L: 16 

INST: CMD 0xa (avr instruction)
 TDI 1110_0000_0010_0001 = e021, L: 16 	ldi	r18, 0x01	; 1
 TDO 0000_0001_0101_1100 = 015c, L: 16 

INST: CMD 0xa (avr instruction)
 TDI 1011_1011_0000_1111 = bb0f, L: 16 	out	0x1f, r16	; 31
 TDO 0000_0001_0101_1110 = 015e, L: 16 

INST: CMD 0xa (avr instruction)
 TDI 1011_1011_0001_1110 = bb1e, L: 16 	out	0x1e, r17	; 30
 TDO 0000_0001_0110_0000 = 0160, L: 16 

INST: CMD 0xa (avr instruction)
 TDI 1011_1011_0010_1100 = bb2c, L: 16 	out	0x1c, r18	; 28
 TDO 0000_0001_0110_0010 = 0162, L: 16 

INST: CMD 0xa (avr instruction)
 TDI 1011_0011_0000_1101 = b30d, L: 16 	in	r16, 0x1d	; 29
 TDO 0000_0001_0110_0100 = 0164, L: 16 

INST: CMD 0xa (avr instruction)
 TDI 1011_1111_0000_0001 = bf01, L: 16 	out	0x31, r16	; 49
 TDO 0000_0001_0110_0110 = 0166, L: 16 

INST: CMD 0xb (OCD ctrl and status)
 TDI 0_1100 = 0_c, L: 5 
 TDO 0_0000 = 0_0, L: 5 
 TDI 0000_0000_0000_0000 = 0000, L: 16 
 TDO 1111_1111_0000_0000 = ff00, L: 16 

INST: CMD 0xa (avr instruction)
 TDI 1110_0000_0000_0000 = e000, L: 16 	ldi	r16, 0x00	; 0
 TDO 0000_0001_0110_1000 = 0168, L: 16 

INST: CMD 0xa (avr instruction)
 TDI 1110_0000_0001_0010 = e012, L: 16 	ldi	r17, 0x02	; 2
 TDO 0000_0001_0110_1010 = 016a, L: 16 

INST: CMD 0xa (avr instruction)
 TDI 1110_0000_0010_0001 = e021, L: 16 	ldi	r18, 0x01	; 1
 TDO 0000_0001_0110_1100 = 016c, L: 16 

INST: CMD 0xa (avr instruction)
 TDI 1011_1011_0000_1111 = bb0f, L: 16 	out	0x1f, r16	; 31
 TDO 0000_0001_0110_1110 = 016e, L: 16 

INST: CMD 0xa (avr instruction)
 TDI 1011_1011_0001_1110 = bb1e, L: 16 	out	0x1e, r17	; 30
 TDO 0000_0001_0111_0000 = 0170, L: 16 

INST: CMD 0xa (avr instruction)
 TDI 1011_1011_0010_1100 = bb2c, L: 16 	out	0x1c, r18	; 28
 TDO 0000_0001_0111_0010 = 0172, L: 16 

INST: CMD 0xa (avr instruction)
 TDI 1011_0011_0000_1101 = b30d, L: 16 	in	r16, 0x1d	; 29
 TDO 0000_0001_0111_0100 = 0174, L: 16 

INST: CMD 0xa (avr instruction)
 TDI 1011_1111_0000_0001 = bf01, L: 16 	out	0x31, r16	; 49
 TDO 0000_0001_0111_0110 = 0176, L: 16 

INST: CMD 0xb (OCD ctrl and status)
 TDI 0_1100 = 0_c, L: 5 
 TDO 0_0000 = 0_0, L: 5 
 TDI 0000_0000_0000_0000 = 0000, L: 16 
 TDO 1111_1111_0000_0000 = ff00, L: 16 

INST: CMD 0xa (avr instruction)
 TDI 1110_0000_0000_0000 = e000, L: 16 	ldi	r16, 0x00	; 0
 TDO 0000_0001_0111_1000 = 0178, L: 16 

INST: CMD 0xa (avr instruction)
 TDI 1110_0000_0001_0011 = e013, L: 16 	ldi	r17, 0x03	; 3
 TDO 0000_0001_0111_1010 = 017a, L: 16 

INST: CMD 0xa (avr instruction)
 TDI 1110_0000_0010_0001 = e021, L: 16 	ldi	r18, 0x01	; 1
 TDO 0000_0001_0111_1100 = 017c, L: 16 

INST: CMD 0xa (avr instruction)
 TDI 1011_1011_0000_1111 = bb0f, L: 16 	out	0x1f, r16	; 31
 TDO 0000_0001_0111_1110 = 017e, L: 16 

INST: CMD 0xa (avr instruction)
 TDI 1011_1011_0001_1110 = bb1e, L: 16 	out	0x1e, r17	; 30
 TDO 0000_0001_1000_0000 = 0180, L: 16 

INST: CMD 0xa (avr instruction)
 TDI 1011_1011_0010_1100 = bb2c, L: 16 	out	0x1c, r18	; 28
 TDO 0000_0001_1000_0010 = 0182, L: 16 

INST: CMD 0xa (avr instruction)
 TDI 1011_0011_0000_1101 = b30d, L: 16 	in	r16, 0x1d	; 29
 TDO 0000_0001_1000_0100 = 0184, L: 16 

INST: CMD 0xa (avr instruction)
 TDI 1011_1111_0000_0001 = bf01, L: 16 	out	0x31, r16	; 49
 TDO 0000_0001_1000_0110 = 0186, L: 16 

INST: CMD 0xb (OCD ctrl and status)
 TDI 0_1100 = 0_c, L: 5 
 TDO 0_0000 = 0_0, L: 5 
 TDI 0000_0000_0000_0000 = 0000, L: 16 
 TDO 1111_1111_0000_0000 = ff00, L: 16 

INST: CMD 0xa (avr instruction)
 TDI 1110_0000_0000_0000 = e000, L: 16 	ldi	r16, 0x00	; 0
 TDO 0000_0001_1000_1000 = 0188, L: 16 

INST: CMD 0xa (avr instruction)
 TDI 1110_0000_0001_0100 = e014, L: 16 	ldi	r17, 0x04	; 4
 TDO 0000_0001_1000_1010 = 018a, L: 16 

INST: CMD 0xa (avr instruction)
 TDI 1110_0000_0010_0001 = e021, L: 16 	ldi	r18, 0x01	; 1
 TDO 0000_0001_1000_1100 = 018c, L: 16 

INST: CMD 0xa (avr instruction)
 TDI 1011_1011_0000_1111 = bb0f, L: 16 	out	0x1f, r16	; 31
 TDO 0000_0001_1000_1110 = 018e, L: 16 

INST: CMD 0xa (avr instruction)
 TDI 1011_1011_0001_1110 = bb1e, L: 16 	out	0x1e, r17	; 30
 TDO 0000_0001_1001_0000 = 0190, L: 16 

INST: CMD 0xa (avr instruction)
 TDI 1011_1011_0010_1100 = bb2c, L: 16 	out	0x1c, r18	; 28
 TDO 0000_0001_1001_0010 = 0192, L: 16 

INST: CMD 0xa (avr instruction)
 TDI 1011_0011_0000_1101 = b30d, L: 16 	in	r16, 0x1d	; 29
 TDO 0000_0001_1001_0100 = 0194, L: 16 

INST: CMD 0xa (avr instruction)
 TDI 1011_1111_0000_0001 = bf01, L: 16 	out	0x31, r16	; 49
 TDO 0000_0001_1001_0110 = 0196, L: 16 

INST: CMD 0xb (OCD ctrl and status)
 TDI 0_1100 = 0_c, L: 5 
 TDO 0_0000 = 0_0, L: 5 
 TDI 0000_0000_0000_0000 = 0000, L: 16 
 TDO 1111_1111_0000_0000 = ff00, L: 16 

INST: CMD 0xa (avr instruction)
 TDI 1110_0000_0000_0000 = e000, L: 16 	ldi	r16, 0x00	; 0
 TDO 0000_0001_1001_1000 = 0198, L: 16 

INST: CMD 0xa (avr instruction)
 TDI 1110_0000_0001_0101 = e015, L: 16 	ldi	r17, 0x05	; 5
 TDO 0000_0001_1001_1010 = 019a, L: 16 

INST: CMD 0xa (avr instruction)
 TDI 1110_0000_0010_0001 = e021, L: 16 	ldi	r18, 0x01	; 1
 TDO 0000_0001_1001_1100 = 019c, L: 16 

INST: CMD 0xa (avr instruction)
 TDI 1011_1011_0000_1111 = bb0f, L: 16 	out	0x1f, r16	; 31
 TDO 0000_0001_1001_1110 = 019e, L: 16 

INST: CMD 0xa (avr instruction)
 TDI 1011_1011_0001_1110 = bb1e, L: 16 	out	0x1e, r17	; 30
 TDO 0000_0001_1010_0000 = 01a0, L: 16 

INST: CMD 0xa (avr instruction)
 TDI 1011_1011_0010_1100 = bb2c, L: 16 	out	0x1c, r18	; 28
 TDO 0000_0001_1010_0010 = 01a2, L: 16 

INST: CMD 0xa (avr instruction)
 TDI 1011_0011_0000_1101 = b30d, L: 16 	in	r16, 0x1d	; 29
 TDO 0000_0001_1010_0100 = 01a4, L: 16 

INST: CMD 0xa (avr instruction)
 TDI 1011_1111_0000_0001 = bf01, L: 16 	out	0x31, r16	; 49
 TDO 0000_0001_1010_0110 = 01a6, L: 16 

INST: CMD 0xb (OCD ctrl and status)
 TDI 0_1100 = 0_c, L: 5 
 TDO 0_0000 = 0_0, L: 5 
 TDI 0000_0000_0000_0000 = 0000, L: 16 
 TDO 1111_1111_0000_0000 = ff00, L: 16 

INST: CMD 0xa (avr instruction)
 TDI 1110_0000_0000_0000 = e000, L: 16 	ldi	r16, 0x00	; 0
 TDO 0000_0001_1010_1000 = 01a8, L: 16 

INST: CMD 0xa (avr instruction)
 TDI 1110_0000_0001_0110 = e016, L: 16 	ldi	r17, 0x06	; 6
 TDO 0000_0001_1010_1010 = 01aa, L: 16 

INST: CMD 0xa (avr instruction)
 TDI 1110_0000_0010_0001 = e021, L: 16 	ldi	r18, 0x01	; 1
 TDO 0000_0001_1010_1100 = 01ac, L: 16 

INST: CMD 0xa (avr instruction)
 TDI 1011_1011_0000_1111 = bb0f, L: 16 	out	0x1f, r16	; 31
 TDO 0000_0001_1010_1110 = 01ae, L: 16 

INST: CMD 0xa (avr instruction)
 TDI 1011_1011_0001_1110 = bb1e, L: 16 	out	0x1e, r17	; 30
 TDO 0000_0001_1011_0000 = 01b0, L: 16 

INST: CMD 0xa (avr instruction)
 TDI 1011_1011_0010_1100 = bb2c, L: 16 	out	0x1c, r18	; 28
 TDO 0000_0001_1011_0010 = 01b2, L: 16 

INST: CMD 0xa (avr instruction)
 TDI 1011_0011_0000_1101 = b30d, L: 16 	in	r16, 0x1d	; 29
 TDO 0000_0001_1011_0100 = 01b4, L: 16 

INST: CMD 0xa (avr instruction)
 TDI 1011_1111_0000_0001 = bf01, L: 16 	out	0x31, r16	; 49
 TDO 0000_0001_1011_0110 = 01b6, L: 16 

INST: CMD 0xb (OCD ctrl and status)
 TDI 0_1100 = 0_c, L: 5 
 TDO 0_0000 = 0_0, L: 5 
 TDI 0000_0000_0000_0000 = 0000, L: 16 
 TDO 1111_1111_0000_0000 = ff00, L: 16 

INST: CMD 0xa (avr instruction)
 TDI 1110_0000_0000_0000 = e000, L: 16 	ldi	r16, 0x00	; 0
 TDO 0000_0001_1011_1000 = 01b8, L: 16 

INST: CMD 0xa (avr instruction)
 TDI 1110_0000_0001_0111 = e017, L: 16 	ldi	r17, 0x07	; 7
 TDO 0000_0001_1011_1010 = 01ba, L: 16 

INST: CMD 0xa (avr instruction)
 TDI 1110_0000_0010_0001 = e021, L: 16 	ldi	r18, 0x01	; 1
 TDO 0000_0001_1011_1100 = 01bc, L: 16 

INST: CMD 0xa (avr instruction)
 TDI 1011_1011_0000_1111 = bb0f, L: 16 	out	0x1f, r16	; 31
 TDO 0000_0001_1011_1110 = 01be, L: 16 

INST: CMD 0xa (avr instruction)
 TDI 1011_1011_0001_1110 = bb1e, L: 16 	out	0x1e, r17	; 30
 TDO 0000_0001_1100_0000 = 01c0, L: 16 

INST: CMD 0xa (avr instruction)
 TDI 1011_1011_0010_1100 = bb2c, L: 16 	out	0x1c, r18	; 28
 TDO 0000_0001_1100_0010 = 01c2, L: 16 

INST: CMD 0xa (avr instruction)
 TDI 1011_0011_0000_1101 = b30d, L: 16 	in	r16, 0x1d	; 29
 TDO 0000_0001_1100_0100 = 01c4, L: 16 

INST: CMD 0xa (avr instruction)
 TDI 1011_1111_0000_0001 = bf01, L: 16 	out	0x31, r16	; 49
 TDO 0000_0001_1100_0110 = 01c6, L: 16 

INST: CMD 0xb (OCD ctrl and status)
 TDI 0_1100 = 0_c, L: 5 
 TDO 0_0000 = 0_0, L: 5 
 TDI 0000_0000_0000_0000 = 0000, L: 16 
 TDO 1111_1111_0000_0000 = ff00, L: 16 

INST: CMD 0xa (avr instruction)
 TDI 1110_0000_0000_0000 = e000, L: 16 	ldi	r16, 0x00	; 0
 TDO 0000_0001_1100_1000 = 01c8, L: 16 

INST: CMD 0xa (avr instruction)
 TDI 1110_0000_0001_1000 = e018, L: 16 	ldi	r17, 0x08	; 8
 TDO 0000_0001_1100_1010 = 01ca, L: 16 

INST: CMD 0xa (avr instruction)
 TDI 1110_0000_0010_0001 = e021, L: 16 	ldi	r18, 0x01	; 1
 TDO 0000_0001_1100_1100 = 01cc, L: 16 

INST: CMD 0xa (avr instruction)
 TDI 1011_1011_0000_1111 = bb0f, L: 16 	out	0x1f, r16	; 31
 TDO 0000_0001_1100_1110 = 01ce, L: 16 

INST: CMD 0xa (avr instruction)
 TDI 1011_1011_0001_1110 = bb1e, L: 16 	out	0x1e, r17	; 30
 TDO 0000_0001_1101_0000 = 01d0, L: 16 

INST: CMD 0xa (avr instruction)
 TDI 1011_1011_0010_1100 = bb2c, L: 16 	out	0x1c, r18	; 28
 TDO 0000_0001_1101_0010 = 01d2, L: 16 

INST: CMD 0xa (avr instruction)
 TDI 1011_0011_0000_1101 = b30d, L: 16 	in	r16, 0x1d	; 29
 TDO 0000_0001_1101_0100 = 01d4, L: 16 

INST: CMD 0xa (avr instruction)
 TDI 1011_1111_0000_0001 = bf01, L: 16 	out	0x31, r16	; 49
 TDO 0000_0001_1101_0110 = 01d6, L: 16 

INST: CMD 0xb (OCD ctrl and status)
 TDI 0_1100 = 0_c, L: 5 
 TDO 0_0000 = 0_0, L: 5 
 TDI 0000_0000_0000_0000 = 0000, L: 16 
 TDO 1111_1111_0000_0000 = ff00, L: 16 

INST: CMD 0xa (avr instruction)
 TDI 1110_0000_0000_0000 = e000, L: 16 	ldi	r16, 0x00	; 0
 TDO 0000_0001_1101_1000 = 01d8, L: 16 

INST: CMD 0xa (avr instruction)
 TDI 1110_0000_0001_1001 = e019, L: 16 	ldi	r17, 0x09	; 9
 TDO 0000_0001_1101_1010 = 01da, L: 16 

INST: CMD 0xa (avr instruction)
 TDI 1110_0000_0010_0001 = e021, L: 16 	ldi	r18, 0x01	; 1
 TDO 0000_0001_1101_1100 = 01dc, L: 16 

INST: CMD 0xa (avr instruction)
 TDI 1011_1011_0000_1111 = bb0f, L: 16 	out	0x1f, r16	; 31
 TDO 0000_0001_1101_1110 = 01de, L: 16 

INST: CMD 0xa (avr instruction)
 TDI 1011_1011_0001_1110 = bb1e, L: 16 	out	0x1e, r17	; 30
 TDO 0000_0001_1110_0000 = 01e0, L: 16 

INST: CMD 0xa (avr instruction)
 TDI 1011_1011_0010_1100 = bb2c, L: 16 	out	0x1c, r18	; 28
 TDO 0000_0001_1110_0010 = 01e2, L: 16 

INST: CMD 0xa (avr instruction)
 TDI 1011_0011_0000_1101 = b30d, L: 16 	in	r16, 0x1d	; 29
 TDO 0000_0001_1110_0100 = 01e4, L: 16 

INST: CMD 0xa (avr instruction)
 TDI 1011_1111_0000_0001 = bf01, L: 16 	out	0x31, r16	; 49
 TDO 0000_0001_1110_0110 = 01e6, L: 16 

INST: CMD 0xb (OCD ctrl and status)
 TDI 0_1100 = 0_c, L: 5 
 TDO 0_0000 = 0_0, L: 5 
 TDI 0000_0000_0000_0000 = 0000, L: 16 
 TDO 1111_1111_0000_0000 = ff00, L: 16 

INST: CMD 0xa (avr instruction)
 TDI 1110_0000_0000_0000 = e000, L: 16 	ldi	r16, 0x00	; 0
 TDO 0000_0001_1110_1000 = 01e8, L: 16 

INST: CMD 0xa (avr instruction)
 TDI 1110_0000_0001_1010 = e01a, L: 16 	ldi	r17, 0x0A	; 10
 TDO 0000_0001_1110_1010 = 01ea, L: 16 

INST: CMD 0xa (avr instruction)
 TDI 1110_0000_0010_0001 = e021, L: 16 	ldi	r18, 0x01	; 1
 TDO 0000_0001_1110_1100 = 01ec, L: 16 

INST: CMD 0xa (avr instruction)
 TDI 1011_1011_0000_1111 = bb0f, L: 16 	out	0x1f, r16	; 31
 TDO 0000_0001_1110_1110 = 01ee, L: 16 

INST: CMD 0xa (avr instruction)
 TDI 1011_1011_0001_1110 = bb1e, L: 16 	out	0x1e, r17	; 30
 TDO 0000_0001_1111_0000 = 01f0, L: 16 

INST: CMD 0xa (avr instruction)
 TDI 1011_1011_0010_1100 = bb2c, L: 16 	out	0x1c, r18	; 28
 TDO 0000_0001_1111_0010 = 01f2, L: 16 

INST: CMD 0xa (avr instruction)
 TDI 1011_0011_0000_1101 = b30d, L: 16 	in	r16, 0x1d	; 29
 TDO 0000_0001_1111_0100 = 01f4, L: 16 

INST: CMD 0xa (avr instruction)
 TDI 1011_1111_0000_0001 = bf01, L: 16 	out	0x31, r16	; 49
 TDO 0000_0001_1111_0110 = 01f6, L: 16 

INST: CMD 0xb (OCD ctrl and status)
 TDI 0_1100 = 0_c, L: 5 
 TDO 0_0000 = 0_0, L: 5 
 TDI 0000_0000_0000_0000 = 0000, L: 16 
 TDO 1111_1111_0000_0000 = ff00, L: 16 

INST: CMD 0xa (avr instruction)
 TDI 1110_0000_0000_0000 = e000, L: 16 	ldi	r16, 0x00	; 0
 TDO 0000_0001_1111_1000 = 01f8, L: 16 

INST: CMD 0xa (avr instruction)
 TDI 1110_0000_0001_1011 = e01b, L: 16 	ldi	r17, 0x0B	; 11
 TDO 0000_0001_1111_1010 = 01fa, L: 16 

INST: CMD 0xa (avr instruction)
 TDI 1110_0000_0010_0001 = e021, L: 16 	ldi	r18, 0x01	; 1
 TDO 0000_0001_1111_1100 = 01fc, L: 16 

INST: CMD 0xa (avr instruction)
 TDI 1011_1011_0000_1111 = bb0f, L: 16 	out	0x1f, r16	; 31
 TDO 0000_0001_1111_1110 = 01fe, L: 16 

INST: CMD 0xa (avr instruction)
 TDI 1011_1011_0001_1110 = bb1e, L: 16 	out	0x1e, r17	; 30
 TDO 0000_0010_0000_0000 = 0200, L: 16 

INST: CMD 0xa (avr instruction)
 TDI 1011_1011_0010_1100 = bb2c, L: 16 	out	0x1c, r18	; 28
 TDO 0000_0010_0000_0010 = 0202, L: 16 

INST: CMD 0xa (avr instruction)
 TDI 1011_0011_0000_1101 = b30d, L: 16 	in	r16, 0x1d	; 29
 TDO 0000_0010_0000_0100 = 0204, L: 16 

INST: CMD 0xa (avr instruction)
 TDI 1011_1111_0000_0001 = bf01, L: 16 	out	0x31, r16	; 49
 TDO 0000_0010_0000_0110 = 0206, L: 16 

INST: CMD 0xb (OCD ctrl and status)
 TDI 0_1100 = 0_c, L: 5 
 TDO 0_0000 = 0_0, L: 5 
 TDI 0000_0000_0000_0000 = 0000, L: 16 
 TDO 1111_1111_0000_0000 = ff00, L: 16 

INST: CMD 0xa (avr instruction)
 TDI 1110_0000_0000_0000 = e000, L: 16 	ldi	r16, 0x00	; 0
 TDO 0000_0010_0000_1000 = 0208, L: 16 

INST: CMD 0xa (avr instruction)
 TDI 1110_0000_0001_1100 = e01c, L: 16 	ldi	r17, 0x0C	; 12
 TDO 0000_0010_0000_1010 = 020a, L: 16 

INST: CMD 0xa (avr instruction)
 TDI 1110_0000_0010_0001 = e021, L: 16 	ldi	r18, 0x01	; 1
 TDO 0000_0010_0000_1100 = 020c, L: 16 

INST: CMD 0xa (avr instruction)
 TDI 1011_1011_0000_1111 = bb0f, L: 16 	out	0x1f, r16	; 31
 TDO 0000_0010_0000_1110 = 020e, L: 16 

INST: CMD 0xa (avr instruction)
 TDI 1011_1011_0001_1110 = bb1e, L: 16 	out	0x1e, r17	; 30
 TDO 0000_0010_0001_0000 = 0210, L: 16 

INST: CMD 0xa (avr instruction)
 TDI 1011_1011_0010_1100 = bb2c, L: 16 	out	0x1c, r18	; 28
 TDO 0000_0010_0001_0010 = 0212, L: 16 

INST: CMD 0xa (avr instruction)
 TDI 1011_0011_0000_1101 = b30d, L: 16 	in	r16, 0x1d	; 29
 TDO 0000_0010_0001_0100 = 0214, L: 16 

INST: CMD 0xa (avr instruction)
 TDI 1011_1111_0000_0001 = bf01, L: 16 	out	0x31, r16	; 49
 TDO 0000_0010_0001_0110 = 0216, L: 16 

INST: CMD 0xb (OCD ctrl and status)
 TDI 0_1100 = 0_c, L: 5 
 TDO 0_0000 = 0_0, L: 5 
 TDI 0000_0000_0000_0000 = 0000, L: 16 
 TDO 1111_1111_0000_0000 = ff00, L: 16 

INST: CMD 0xa (avr instruction)
 TDI 1110_0000_0000_0000 = e000, L: 16 	ldi	r16, 0x00	; 0
 TDO 0000_0010_0001_1000 = 0218, L: 16 

INST: CMD 0xa (avr instruction)
 TDI 1110_0000_0001_1101 = e01d, L: 16 	ldi	r17, 0x0D	; 13
 TDO 0000_0010_0001_1010 = 021a, L: 16 

INST: CMD 0xa (avr instruction)
 TDI 1110_0000_0010_0001 = e021, L: 16 	ldi	r18, 0x01	; 1
 TDO 0000_0010_0001_1100 = 021c, L: 16 

INST: CMD 0xa (avr instruction)
 TDI 1011_1011_0000_1111 = bb0f, L: 16 	out	0x1f, r16	; 31
 TDO 0000_0010_0001_1110 = 021e, L: 16 

INST: CMD 0xa (avr instruction)
 TDI 1011_1011_0001_1110 = bb1e, L: 16 	out	0x1e, r17	; 30
 TDO 0000_0010_0010_0000 = 0220, L: 16 

INST: CMD 0xa (avr instruction)
 TDI 1011_1011_0010_1100 = bb2c, L: 16 	out	0x1c, r18	; 28
 TDO 0000_0010_0010_0010 = 0222, L: 16 

INST: CMD 0xa (avr instruction)
 TDI 1011_0011_0000_1101 = b30d, L: 16 	in	r16, 0x1d	; 29
 TDO 0000_0010_0010_0100 = 0224, L: 16 

INST: CMD 0xa (avr instruction)
 TDI 1011_1111_0000_0001 = bf01, L: 16 	out	0x31, r16	; 49
 TDO 0000_0010_0010_0110 = 0226, L: 16 

INST: CMD 0xb (OCD ctrl and status)
 TDI 0_1100 = 0_c, L: 5 
 TDO 0_0000 = 0_0, L: 5 
 TDI 0000_0000_0000_0000 = 0000, L: 16 
 TDO 1111_1111_0000_0000 = ff00, L: 16 

INST: CMD 0xa (avr instruction)
 TDI 1110_0000_0000_0000 = e000, L: 16 	ldi	r16, 0x00	; 0
 TDO 0000_0010_0010_1000 = 0228, L: 16 

INST: CMD 0xa (avr instruction)
 TDI 1110_0000_0001_1110 = e01e, L: 16 	ldi	r17, 0x0E	; 14
 TDO 0000_0010_0010_1010 = 022a, L: 16 

INST: CMD 0xa (avr instruction)
 TDI 1110_0000_0010_0001 = e021, L: 16 	ldi	r18, 0x01	; 1
 TDO 0000_0010_0010_1100 = 022c, L: 16 

INST: CMD 0xa (avr instruction)
 TDI 1011_1011_0000_1111 = bb0f, L: 16 	out	0x1f, r16	; 31
 TDO 0000_0010_0010_1110 = 022e, L: 16 

INST: CMD 0xa (avr instruction)
 TDI 1011_1011_0001_1110 = bb1e, L: 16 	out	0x1e, r17	; 30
 TDO 0000_0010_0011_0000 = 0230, L: 16 

INST: CMD 0xa (avr instruction)
 TDI 1011_1011_0010_1100 = bb2c, L: 16 	out	0x1c, r18	; 28
 TDO 0000_0010_0011_0010 = 0232, L: 16 

INST: CMD 0xa (avr instruction)
 TDI 1011_0011_0000_1101 = b30d, L: 16 	in	r16, 0x1d	; 29
 TDO 0000_0010_0011_0100 = 0234, L: 16 

INST: CMD 0xa (avr instruction)
 TDI 1011_1111_0000_0001 = bf01, L: 16 	out	0x31, r16	; 49
 TDO 0000_0010_0011_0110 = 0236, L: 16 

INST: CMD 0xb (OCD ctrl and status)
 TDI 0_1100 = 0_c, L: 5 
 TDO 0_0000 = 0_0, L: 5 
 TDI 0000_0000_0000_0000 = 0000, L: 16 
 TDO 1111_1111_0000_0000 = ff00, L: 16 

INST: CMD 0xa (avr instruction)
 TDI 1110_0000_0000_0000 = e000, L: 16 	ldi	r16, 0x00	; 0
 TDO 0000_0010_0011_1000 = 0238, L: 16 

INST: CMD 0xa (avr instruction)
 TDI 1110_0000_0001_1111 = e01f, L: 16 	ldi	r17, 0x0F	; 15
 TDO 0000_0010_0011_1010 = 023a, L: 16 

INST: CMD 0xa (avr instruction)
 TDI 1110_0000_0010_0001 = e021, L: 16 	ldi	r18, 0x01	; 1
 TDO 0000_0010_0011_1100 = 023c, L: 16 

INST: CMD 0xa (avr instruction)
 TDI 1011_1011_0000_1111 = bb0f, L: 16 	out	0x1f, r16	; 31
 TDO 0000_0010_0011_1110 = 023e, L: 16 

INST: CMD 0xa (avr instruction)
 TDI 1011_1011_0001_1110 = bb1e, L: 16 	out	0x1e, r17	; 30
 TDO 0000_0010_0100_0000 = 0240, L: 16 

INST: CMD 0xa (avr instruction)
 TDI 1011_1011_0010_1100 = bb2c, L: 16 	out	0x1c, r18	; 28
 TDO 0000_0010_0100_0010 = 0242, L: 16 

INST: CMD 0xa (avr instruction)
 TDI 1011_0011_0000_1101 = b30d, L: 16 	in	r16, 0x1d	; 29
 TDO 0000_0010_0100_0100 = 0244, L: 16 

INST: CMD 0xa (avr instruction)
 TDI 1011_1111_0000_0001 = bf01, L: 16 	out	0x31, r16	; 49
 TDO 0000_0010_0100_0110 = 0246, L: 16 

INST: CMD 0xb (OCD ctrl and status)
 TDI 0_1100 = 0_c, L: 5 
 TDO 0_0000 = 0_0, L: 5 
 TDI 0000_0000_0000_0000 = 0000, L: 16 
 TDO 1111_1111_0000_0000 = ff00, L: 16 

INST: CMD 0xa (avr instruction)
 TDI 1110_0000_0000_0000 = e000, L: 16 	ldi	r16, 0x00	; 0
 TDO 0000_0010_0100_1000 = 0248, L: 16 

INST: CMD 0xa (avr instruction)
 TDI 1110_0001_0001_0000 = e110, L: 16 	ldi	r17, 0x10	; 16
 TDO 0000_0010_0100_1010 = 024a, L: 16 

INST: CMD 0xa (avr instruction)
 TDI 1110_0000_0010_0001 = e021, L: 16 	ldi	r18, 0x01	; 1
 TDO 0000_0010_0100_1100 = 024c, L: 16 

INST: CMD 0xa (avr instruction)
 TDI 1011_1011_0000_1111 = bb0f, L: 16 	out	0x1f, r16	; 31
 TDO 0000_0010_0100_1110 = 024e, L: 16 

INST: CMD 0xa (avr instruction)
 TDI 1011_1011_0001_1110 = bb1e, L: 16 	out	0x1e, r17	; 30
 TDO 0000_0010_0101_0000 = 0250, L: 16 

INST: CMD 0xa (avr instruction)
 TDI 1011_1011_0010_1100 = bb2c, L: 16 	out	0x1c, r18	; 28
 TDO 0000_0010_0101_0010 = 0252, L: 16 

INST: CMD 0xa (avr instruction)
 TDI 1011_0011_0000_1101 = b30d, L: 16 	in	r16, 0x1d	; 29
 TDO 0000_0010_0101_0100 = 0254, L: 16 

INST: CMD 0xa (avr instruction)
 TDI 1011_1111_0000_0001 = bf01, L: 16 	out	0x31, r16	; 49
 TDO 0000_0010_0101_0110 = 0256, L: 16 

INST: CMD 0xb (OCD ctrl and status)
 TDI 0_1100 = 0_c, L: 5 
 TDO 0_0000 = 0_0, L: 5 
 TDI 0000_0000_0000_0000 = 0000, L: 16 
 TDO 1111_1111_0000_0000 = ff00, L: 16 

INST: CMD 0xa (avr instruction)
 TDI 1110_0000_0000_0000 = e000, L: 16 	ldi	r16, 0x00	; 0
 TDO 0000_0010_0101_1000 = 0258, L: 16 

INST: CMD 0xa (avr instruction)
 TDI 1110_0001_0001_0001 = e111, L: 16 	ldi	r17, 0x11	; 17
 TDO 0000_0010_0101_1010 = 025a, L: 16 

INST: CMD 0xa (avr instruction)
 TDI 1110_0000_0010_0001 = e021, L: 16 	ldi	r18, 0x01	; 1
 TDO 0000_0010_0101_1100 = 025c, L: 16 

INST: CMD 0xa (avr instruction)
 TDI 1011_1011_0000_1111 = bb0f, L: 16 	out	0x1f, r16	; 31
 TDO 0000_0010_0101_1110 = 025e, L: 16 

INST: CMD 0xa (avr instruction)
 TDI 1011_1011_0001_1110 = bb1e, L: 16 	out	0x1e, r17	; 30
 TDO 0000_0010_0110_0000 = 0260, L: 16 

INST: CMD 0xa (avr instruction)
 TDI 1011_1011_0010_1100 = bb2c, L: 16 	out	0x1c, r18	; 28
 TDO 0000_0010_0110_0010 = 0262, L: 16 

INST: CMD 0xa (avr instruction)
 TDI 1011_0011_0000_1101 = b30d, L: 16 	in	r16, 0x1d	; 29
 TDO 0000_0010_0110_0100 = 0264, L: 16 

INST: CMD 0xa (avr instruction)
 TDI 1011_1111_0000_0001 = bf01, L: 16 	out	0x31, r16	; 49
 TDO 0000_0010_0110_0110 = 0266, L: 16 

INST: CMD 0xb (OCD ctrl and status)
 TDI 0_1100 = 0_c, L: 5 
 TDO 0_0000 = 0_0, L: 5 
 TDI 0000_0000_0000_0000 = 0000, L: 16 
 TDO 1111_1111_0000_0000 = ff00, L: 16 

INST: CMD 0xa (avr instruction)
 TDI 1110_0000_0000_0000 = e000, L: 16 	ldi	r16, 0x00	; 0
 TDO 0000_0010_0110_1000 = 0268, L: 16 

INST: CMD 0xa (avr instruction)
 TDI 1110_0001_0001_0010 = e112, L: 16 	ldi	r17, 0x12	; 18
 TDO 0000_0010_0110_1010 = 026a, L: 16 

INST: CMD 0xa (avr instruction)
 TDI 1110_0000_0010_0001 = e021, L: 16 	ldi	r18, 0x01	; 1
 TDO 0000_0010_0110_1100 = 026c, L: 16 

INST: CMD 0xa (avr instruction)
 TDI 1011_1011_0000_1111 = bb0f, L: 16 	out	0x1f, r16	; 31
 TDO 0000_0010_0110_1110 = 026e, L: 16 

INST: CMD 0xa (avr instruction)
 TDI 1011_1011_0001_1110 = bb1e, L: 16 	out	0x1e, r17	; 30
 TDO 0000_0010_0111_0000 = 0270, L: 16 

INST: CMD 0xa (avr instruction)
 TDI 1011_1011_0010_1100 = bb2c, L: 16 	out	0x1c, r18	; 28
 TDO 0000_0010_0111_0010 = 0272, L: 16 

INST: CMD 0xa (avr instruction)
 TDI 1011_0011_0000_1101 = b30d, L: 16 	in	r16, 0x1d	; 29
 TDO 0000_0010_0111_0100 = 0274, L: 16 

INST: CMD 0xa (avr instruction)
 TDI 1011_1111_0000_0001 = bf01, L: 16 	out	0x31, r16	; 49
 TDO 0000_0010_0111_0110 = 0276, L: 16 

INST: CMD 0xb (OCD ctrl and status)
 TDI 0_1100 = 0_c, L: 5 
 TDO 0_0000 = 0_0, L: 5 
 TDI 0000_0000_0000_0000 = 0000, L: 16 
 TDO 1111_1111_0000_0000 = ff00, L: 16 

INST: CMD 0xa (avr instruction)
 TDI 1110_0000_0000_0000 = e000, L: 16 	ldi	r16, 0x00	; 0
 TDO 0000_0010_0111_1000 = 0278, L: 16 

INST: CMD 0xa (avr instruction)
 TDI 1110_0001_0001_0011 = e113, L: 16 	ldi	r17, 0x13	; 19
 TDO 0000_0010_0111_1010 = 027a, L: 16 

INST: CMD 0xa (avr instruction)
 TDI 1110_0000_0010_0001 = e021, L: 16 	ldi	r18, 0x01	; 1
 TDO 0000_0010_0111_1100 = 027c, L: 16 

INST: CMD 0xa (avr instruction)
 TDI 1011_1011_0000_1111 = bb0f, L: 16 	out	0x1f, r16	; 31
 TDO 0000_0010_0111_1110 = 027e, L: 16 

INST: CMD 0xa (avr instruction)
 TDI 1011_1011_0001_1110 = bb1e, L: 16 	out	0x1e, r17	; 30
 TDO 0000_0010_1000_0000 = 0280, L: 16 

INST: CMD 0xa (avr instruction)
 TDI 1011_1011_0010_1100 = bb2c, L: 16 	out	0x1c, r18	; 28
 TDO 0000_0010_1000_0010 = 0282, L: 16 

INST: CMD 0xa (avr instruction)
 TDI 1011_0011_0000_1101 = b30d, L: 16 	in	r16, 0x1d	; 29
 TDO 0000_0010_1000_0100 = 0284, L: 16 

INST: CMD 0xa (avr instruction)
 TDI 1011_1111_0000_0001 = bf01, L: 16 	out	0x31, r16	; 49
 TDO 0000_0010_1000_0110 = 0286, L: 16 

INST: CMD 0xb (OCD ctrl and status)
 TDI 0_1100 = 0_c, L: 5 
 TDO 0_0000 = 0_0, L: 5 
 TDI 0000_0000_0000_0000 = 0000, L: 16 
 TDO 1111_1111_0000_0000 = ff00, L: 16 

INST: CMD 0xa (avr instruction)
 TDI 1110_0000_0000_0000 = e000, L: 16 	ldi	r16, 0x00	; 0
 TDO 0000_0010_1000_1000 = 0288, L: 16 

INST: CMD 0xa (avr instruction)
 TDI 1110_0001_0001_0100 = e114, L: 16 	ldi	r17, 0x14	; 20
 TDO 0000_0010_1000_1010 = 028a, L: 16 

INST: CMD 0xa (avr instruction)
 TDI 1110_0000_0010_0001 = e021, L: 16 	ldi	r18, 0x01	; 1
 TDO 0000_0010_1000_1100 = 028c, L: 16 

INST: CMD 0xa (avr instruction)
 TDI 1011_1011_0000_1111 = bb0f, L: 16 	out	0x1f, r16	; 31
 TDO 0000_0010_1000_1110 = 028e, L: 16 

INST: CMD 0xa (avr instruction)
 TDI 1011_1011_0001_1110 = bb1e, L: 16 	out	0x1e, r17	; 30
 TDO 0000_0010_1001_0000 = 0290, L: 16 

INST: CMD 0xa (avr instruction)
 TDI 1011_1011_0010_1100 = bb2c, L: 16 	out	0x1c, r18	; 28
 TDO 0000_0010_1001_0010 = 0292, L: 16 

INST: CMD 0xa (avr instruction)
 TDI 1011_0011_0000_1101 = b30d, L: 16 	in	r16, 0x1d	; 29
 TDO 0000_0010_1001_0100 = 0294, L: 16 

INST: CMD 0xa (avr instruction)
 TDI 1011_1111_0000_0001 = bf01, L: 16 	out	0x31, r16	; 49
 TDO 0000_0010_1001_0110 = 0296, L: 16 

INST: CMD 0xb (OCD ctrl and status)
 TDI 0_1100 = 0_c, L: 5 
 TDO 0_0000 = 0_0, L: 5 
 TDI 0000_0000_0000_0000 = 0000, L: 16 
 TDO 1111_1111_0000_0000 = ff00, L: 16 

INST: CMD 0xa (avr instruction)
 TDI 1110_0000_0000_0000 = e000, L: 16 	ldi	r16, 0x00	; 0
 TDO 0000_0010_1001_1000 = 0298, L: 16 

INST: CMD 0xa (avr instruction)
 TDI 1110_0001_0001_0101 = e115, L: 16 	ldi	r17, 0x15	; 21
 TDO 0000_0010_1001_1010 = 029a, L: 16 

INST: CMD 0xa (avr instruction)
 TDI 1110_0000_0010_0001 = e021, L: 16 	ldi	r18, 0x01	; 1
 TDO 0000_0010_1001_1100 = 029c, L: 16 

INST: CMD 0xa (avr instruction)
 TDI 1011_1011_0000_1111 = bb0f, L: 16 	out	0x1f, r16	; 31
 TDO 0000_0010_1001_1110 = 029e, L: 16 

INST: CMD 0xa (avr instruction)
 TDI 1011_1011_0001_1110 = bb1e, L: 16 	out	0x1e, r17	; 30
 TDO 0000_0010_1010_0000 = 02a0, L: 16 

INST: CMD 0xa (avr instruction)
 TDI 1011_1011_0010_1100 = bb2c, L: 16 	out	0x1c, r18	; 28
 TDO 0000_0010_1010_0010 = 02a2, L: 16 

INST: CMD 0xa (avr instruction)
 TDI 1011_0011_0000_1101 = b30d, L: 16 	in	r16, 0x1d	; 29
 TDO 0000_0010_1010_0100 = 02a4, L: 16 

INST: CMD 0xa (avr instruction)
 TDI 1011_1111_0000_0001 = bf01, L: 16 	out	0x31, r16	; 49
 TDO 0000_0010_1010_0110 = 02a6, L: 16 

INST: CMD 0xb (OCD ctrl and status)
 TDI 0_1100 = 0_c, L: 5 
 TDO 0_0000 = 0_0, L: 5 
 TDI 0000_0000_0000_0000 = 0000, L: 16 
 TDO 1111_1111_0000_0000 = ff00, L: 16 

INST: CMD 0xa (avr instruction)
 TDI 1110_0000_0000_0000 = e000, L: 16 	ldi	r16, 0x00	; 0
 TDO 0000_0010_1010_1000 = 02a8, L: 16 

INST: CMD 0xa (avr instruction)
 TDI 1110_0001_0001_0110 = e116, L: 16 	ldi	r17, 0x16	; 22
 TDO 0000_0010_1010_1010 = 02aa, L: 16 

INST: CMD 0xa (avr instruction)
 TDI 1110_0000_0010_0001 = e021, L: 16 	ldi	r18, 0x01	; 1
 TDO 0000_0010_1010_1100 = 02ac, L: 16 

INST: CMD 0xa (avr instruction)
 TDI 1011_1011_0000_1111 = bb0f, L: 16 	out	0x1f, r16	; 31
 TDO 0000_0010_1010_1110 = 02ae, L: 16 

INST: CMD 0xa (avr instruction)
 TDI 1011_1011_0001_1110 = bb1e, L: 16 	out	0x1e, r17	; 30
 TDO 0000_0010_1011_0000 = 02b0, L: 16 

INST: CMD 0xa (avr instruction)
 TDI 1011_1011_0010_1100 = bb2c, L: 16 	out	0x1c, r18	; 28
 TDO 0000_0010_1011_0010 = 02b2, L: 16 

INST: CMD 0xa (avr instruction)
 TDI 1011_0011_0000_1101 = b30d, L: 16 	in	r16, 0x1d	; 29
 TDO 0000_0010_1011_0100 = 02b4, L: 16 

INST: CMD 0xa (avr instruction)
 TDI 1011_1111_0000_0001 = bf01, L: 16 	out	0x31, r16	; 49
 TDO 0000_0010_1011_0110 = 02b6, L: 16 

INST: CMD 0xb (OCD ctrl and status)
 TDI 0_1100 = 0_c, L: 5 
 TDO 0_0000 = 0_0, L: 5 
 TDI 0000_0000_0000_0000 = 0000, L: 16 
 TDO 1111_1111_0000_0000 = ff00, L: 16 

INST: CMD 0xa (avr instruction)
 TDI 1110_0000_0000_0000 = e000, L: 16 	ldi	r16, 0x00	; 0
 TDO 0000_0010_1011_1000 = 02b8, L: 16 

INST: CMD 0xa (avr instruction)
 TDI 1110_0001_0001_0111 = e117, L: 16 	ldi	r17, 0x17	; 23
 TDO 0000_0010_1011_1010 = 02ba, L: 16 

INST: CMD 0xa (avr instruction)
 TDI 1110_0000_0010_0001 = e021, L: 16 	ldi	r18, 0x01	; 1
 TDO 0000_0010_1011_1100 = 02bc, L: 16 

INST: CMD 0xa (avr instruction)
 TDI 1011_1011_0000_1111 = bb0f, L: 16 	out	0x1f, r16	; 31
 TDO 0000_0010_1011_1110 = 02be, L: 16 

INST: CMD 0xa (avr instruction)
 TDI 1011_1011_0001_1110 = bb1e, L: 16 	out	0x1e, r17	; 30
 TDO 0000_0010_1100_0000 = 02c0, L: 16 

INST: CMD 0xa (avr instruction)
 TDI 1011_1011_0010_1100 = bb2c, L: 16 	out	0x1c, r18	; 28
 TDO 0000_0010_1100_0010 = 02c2, L: 16 

INST: CMD 0xa (avr instruction)
 TDI 1011_0011_0000_1101 = b30d, L: 16 	in	r16, 0x1d	; 29
 TDO 0000_0010_1100_0100 = 02c4, L: 16 

INST: CMD 0xa (avr instruction)
 TDI 1011_1111_0000_0001 = bf01, L: 16 	out	0x31, r16	; 49
 TDO 0000_0010_1100_0110 = 02c6, L: 16 

INST: CMD 0xb (OCD ctrl and status)
 TDI 0_1100 = 0_c, L: 5 
 TDO 0_0000 = 0_0, L: 5 
 TDI 0000_0000_0000_0000 = 0000, L: 16 
 TDO 1111_1111_0000_0000 = ff00, L: 16 

INST: CMD 0xa (avr instruction)
 TDI 1110_0000_0000_0000 = e000, L: 16 	ldi	r16, 0x00	; 0
 TDO 0000_0010_1100_1000 = 02c8, L: 16 

INST: CMD 0xa (avr instruction)
 TDI 1110_0001_0001_1000 = e118, L: 16 	ldi	r17, 0x18	; 24
 TDO 0000_0010_1100_1010 = 02ca, L: 16 

INST: CMD 0xa (avr instruction)
 TDI 1110_0000_0010_0001 = e021, L: 16 	ldi	r18, 0x01	; 1
 TDO 0000_0010_1100_1100 = 02cc, L: 16 

INST: CMD 0xa (avr instruction)
 TDI 1011_1011_0000_1111 = bb0f, L: 16 	out	0x1f, r16	; 31
 TDO 0000_0010_1100_1110 = 02ce, L: 16 

INST: CMD 0xa (avr instruction)
 TDI 1011_1011_0001_1110 = bb1e, L: 16 	out	0x1e, r17	; 30
 TDO 0000_0010_1101_0000 = 02d0, L: 16 

INST: CMD 0xa (avr instruction)
 TDI 1011_1011_0010_1100 = bb2c, L: 16 	out	0x1c, r18	; 28
 TDO 0000_0010_1101_0010 = 02d2, L: 16 

INST: CMD 0xa (avr instruction)
 TDI 1011_0011_0000_1101 = b30d, L: 16 	in	r16, 0x1d	; 29
 TDO 0000_0010_1101_0100 = 02d4, L: 16 

INST: CMD 0xa (avr instruction)
 TDI 1011_1111_0000_0001 = bf01, L: 16 	out	0x31, r16	; 49
 TDO 0000_0010_1101_0110 = 02d6, L: 16 

INST: CMD 0xb (OCD ctrl and status)
 TDI 0_1100 = 0_c, L: 5 
 TDO 0_0000 = 0_0, L: 5 
 TDI 0000_0000_0000_0000 = 0000, L: 16 
 TDO 1111_1111_0000_0000 = ff00, L: 16 

INST: CMD 0xa (avr instruction)
 TDI 1110_0000_0000_0000 = e000, L: 16 	ldi	r16, 0x00	; 0
 TDO 0000_0010_1101_1000 = 02d8, L: 16 

INST: CMD 0xa (avr instruction)
 TDI 1110_0001_0001_1001 = e119, L: 16 	ldi	r17, 0x19	; 25
 TDO 0000_0010_1101_1010 = 02da, L: 16 

INST: CMD 0xa (avr instruction)
 TDI 1110_0000_0010_0001 = e021, L: 16 	ldi	r18, 0x01	; 1
 TDO 0000_0010_1101_1100 = 02dc, L: 16 

INST: CMD 0xa (avr instruction)
 TDI 1011_1011_0000_1111 = bb0f, L: 16 	out	0x1f, r16	; 31
 TDO 0000_0010_1101_1110 = 02de, L: 16 

INST: CMD 0xa (avr instruction)
 TDI 1011_1011_0001_1110 = bb1e, L: 16 	out	0x1e, r17	; 30
 TDO 0000_0010_1110_0000 = 02e0, L: 16 

INST: CMD 0xa (avr instruction)
 TDI 1011_1011_0010_1100 = bb2c, L: 16 	out	0x1c, r18	; 28
 TDO 0000_0010_1110_0010 = 02e2, L: 16 

INST: CMD 0xa (avr instruction)
 TDI 1011_0011_0000_1101 = b30d, L: 16 	in	r16, 0x1d	; 29
 TDO 0000_0010_1110_0100 = 02e4, L: 16 

INST: CMD 0xa (avr instruction)
 TDI 1011_1111_0000_0001 = bf01, L: 16 	out	0x31, r16	; 49
 TDO 0000_0010_1110_0110 = 02e6, L: 16 

INST: CMD 0xb (OCD ctrl and status)
 TDI 0_1100 = 0_c, L: 5 
 TDO 0_0000 = 0_0, L: 5 
 TDI 0000_0000_0000_0000 = 0000, L: 16 
 TDO 1111_1111_0000_0000 = ff00, L: 16 

INST: CMD 0xa (avr instruction)
 TDI 1110_0000_0000_0000 = e000, L: 16 	ldi	r16, 0x00	; 0
 TDO 0000_0010_1110_1000 = 02e8, L: 16 

INST: CMD 0xa (avr instruction)
 TDI 1110_0001_0001_1010 = e11a, L: 16 	ldi	r17, 0x1A	; 26
 TDO 0000_0010_1110_1010 = 02ea, L: 16 

INST: CMD 0xa (avr instruction)
 TDI 1110_0000_0010_0001 = e021, L: 16 	ldi	r18, 0x01	; 1
 TDO 0000_0010_1110_1100 = 02ec, L: 16 

INST: CMD 0xa (avr instruction)
 TDI 1011_1011_0000_1111 = bb0f, L: 16 	out	0x1f, r16	; 31
 TDO 0000_0010_1110_1110 = 02ee, L: 16 

INST: CMD 0xa (avr instruction)
 TDI 1011_1011_0001_1110 = bb1e, L: 16 	out	0x1e, r17	; 30
 TDO 0000_0010_1111_0000 = 02f0, L: 16 

INST: CMD 0xa (avr instruction)
 TDI 1011_1011_0010_1100 = bb2c, L: 16 	out	0x1c, r18	; 28
 TDO 0000_0010_1111_0010 = 02f2, L: 16 

INST: CMD 0xa (avr instruction)
 TDI 1011_0011_0000_1101 = b30d, L: 16 	in	r16, 0x1d	; 29
 TDO 0000_0010_1111_0100 = 02f4, L: 16 

INST: CMD 0xa (avr instruction)
 TDI 1011_1111_0000_0001 = bf01, L: 16 	out	0x31, r16	; 49
 TDO 0000_0010_1111_0110 = 02f6, L: 16 

INST: CMD 0xb (OCD ctrl and status)
 TDI 0_1100 = 0_c, L: 5 
 TDO 0_0000 = 0_0, L: 5 
 TDI 0000_0000_0000_0000 = 0000, L: 16 
 TDO 1111_1111_0000_0000 = ff00, L: 16 

INST: CMD 0xa (avr instruction)
 TDI 1110_0000_0000_0000 = e000, L: 16 	ldi	r16, 0x00	; 0
 TDO 0000_0010_1111_1000 = 02f8, L: 16 

INST: CMD 0xa (avr instruction)
 TDI 1110_0001_0001_1011 = e11b, L: 16 	ldi	r17, 0x1B	; 27
 TDO 0000_0010_1111_1010 = 02fa, L: 16 

INST: CMD 0xa (avr instruction)
 TDI 1110_0000_0010_0001 = e021, L: 16 	ldi	r18, 0x01	; 1
 TDO 0000_0010_1111_1100 = 02fc, L: 16 

INST: CMD 0xa (avr instruction)
 TDI 1011_1011_0000_1111 = bb0f, L: 16 	out	0x1f, r16	; 31
 TDO 0000_0010_1111_1110 = 02fe, L: 16 

INST: CMD 0xa (avr instruction)
 TDI 1011_1011_0001_1110 = bb1e, L: 16 	out	0x1e, r17	; 30
 TDO 0000_0011_0000_0000 = 0300, L: 16 

INST: CMD 0xa (avr instruction)
 TDI 1011_1011_0010_1100 = bb2c, L: 16 	out	0x1c, r18	; 28
 TDO 0000_0011_0000_0010 = 0302, L: 16 

INST: CMD 0xa (avr instruction)
 TDI 1011_0011_0000_1101 = b30d, L: 16 	in	r16, 0x1d	; 29
 TDO 0000_0011_0000_0100 = 0304, L: 16 

INST: CMD 0xa (avr instruction)
 TDI 1011_1111_0000_0001 = bf01, L: 16 	out	0x31, r16	; 49
 TDO 0000_0011_0000_0110 = 0306, L: 16 

INST: CMD 0xb (OCD ctrl and status)
 TDI 0_1100 = 0_c, L: 5 
 TDO 0_0000 = 0_0, L: 5 
 TDI 0000_0000_0000_0000 = 0000, L: 16 
 TDO 1111_1111_0000_0000 = ff00, L: 16 

INST: CMD 0xa (avr instruction)
 TDI 1110_0000_0000_0000 = e000, L: 16 	ldi	r16, 0x00	; 0
 TDO 0000_0011_0000_1000 = 0308, L: 16 

INST: CMD 0xa (avr instruction)
 TDI 1110_0001_0001_1100 = e11c, L: 16 	ldi	r17, 0x1C	; 28
 TDO 0000_0011_0000_1010 = 030a, L: 16 
 TDI 101 = 5, L: 3 
 TDO 000 = 0, L: 3 
 TDI 1110_0000_0010_0001 = e021, L: 16 	ldi	r18, 0x01	; 1
 TDO 0000_0011_0000_1100 = 030c, L: 16 

INST: CMD 0xa (avr instruction)
 TDI 1011_1011_0000_1111 = bb0f, L: 16 	out	0x1f, r16	; 31
 TDO 0000_0011_0000_1110 = 030e, L: 16 

ERROR: 'JTAG instruction length mismatch: too short' 
Last sample was Nr. 23038
